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Register a new userDesign and standalone characterisation of a capacitively coupled HV-CMOS sensor chip for the CLIC vertex detector
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Added by
Iraklis Kremastiotis
Publication date
2017
fields
Physics
and research's language is
English
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The concept of capacitive coupling between sensors and readout chips is under study for the vertex detector at the proposed high-energy CLIC electron positron collider. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is an active High-Voltage CMOS sensor, designed to be capacitively coupled to the CLICpix2 readout chip. The chip is implemented in a commercial $180$ nm HV-CMOS process and contains a matrix of $128times128$ square pixels with $25$ $mu$m pitch. First prototypes have been produced with a standard resistivity of $sim20$ $Omega$cm for the substrate and tested in standalone mode. The results show a rise time of $sim20$ ns, charge gain of $190$ mV/ke$^{-}$ and $sim40$ e$^{-}$ RMS noise for a power consumption of $4.8$ $mu$W/pixel. The main design aspects, as well as standalone measurement results, are presented.
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In order to achieve the challenging requirements on the CLIC vertex detector, a range of technology options have been considered in recent years. One prominent idea is the use of active sensors implemented in a commercial high-voltage CMOS process, capacitively coupled to hybrid pixel readout chips. Recent results have shown the approach to be feasible, though more detailed studies of the performance of such devices, including simulation, are required. The CLICdp collaboration has developed a number of ASICs as part of its vertex detector R&D programme, and here we present results on the performance of a CCPDv3 active sensor glued to a CLICpix readout chip. Charge collection characteristics and tracking performance have been measured over the full expected angular range of incident particles using 120 GeV/c secondary hadron beams from the CERN SPS. Single hit efficiencies have been observed above 99% in the full range of track incidence angles, down to shallow angles. The single hit resolution has also been observed to be stable over this range, with a resolution around 6 $mu$m. The measured charge collection characterstics have been compared to simulations carried out using the Sentaurus TCAD finite-element simulation package combined with circuit simulations and parametrisations of the readout chip response. The simulations have also been successfully used to reproduce electric fields, depletion depths and the current-voltage characteristics of the device, and have been further used to make predictions about future device designs.
In the context of the studies of the ATLAS High Luminosity LHC programme, radiation tolerant pixel detectors in CMOS technologies are investigated. To evaluate the effects of substrate resistivity on CMOS sensor performance, the H35DEMO demonstrator, containing different diode and amplifier designs, was produced in ams H35 HV-CMOS technology using four different substrate resistivities spanning from $mathrm{80}$ to $mathrm{1000~Omega cdot cm}$. A glueing process using a high-precision flip-chip machine was developed in order to capacitively couple the sensors to FE-I4 Readout ASIC using a thin layer of epoxy glue with good uniformity over a large surface. The resulting assemblies were measured in beam test at the Fermilab Test Beam Facilities with 120 GeV protons and CERN SPS H8 beamline using 80 GeV pions. The in-time efficiency and tracking properties measured for the different sensor types are shown to be compatible with the ATLAS ITk requirements for its pixel sensors.
Monolithic active pixel sensors produced in High Voltage CMOS (HV-CMOS) technology are being considered for High Energy Physics applications due to the ease of production and the reduced costs. Such technology is especially appealing when large areas to be covered and material budget are concerned. This is the case of the outermost pixel layers of the future ATLAS tracking detector for the HL-LHC. For experiments at hadron colliders, radiation hardness is a key requirement which is not fulfilled by standard CMOS sensor designs that collect charge by diffusion. This issue has been addressed by depleted active pixel sensors in which electronics are embedded into a large deep implantation ensuring uniform charge collection by drift. Very first small prototypes of hybrid depleted active pixel sensors have already shown a radiation hardness compatible with the ATLAS requirements. Nevertheless, to compete with the present hybrid solutions a further reduction in costs achievable by a fully monolithic design is desirable. The H35DEMO is a large electrode full reticle demonstrator chip produced in AMS 350 nm HV-CMOS technology by the collaboration of Karlsruher Institut fur Technologie (KIT), Institut de Fisica dAltes Energies (IFAE), University of Liverpool and University of Geneva. It includes two large monolithic pixel matrices which can be operated standalone. One of these two matrices has been characterised at beam test before and after irradiation with protons and neutrons. Results demonstrated the feasibility of producing radiation hard large area fully monolithic pixel sensors in HV-CMOS technology. H35DEMO chips with a substrate resistivity of 200$Omega$ cm irradiated with neutrons showed a radiation hardness up to a fluence of $10^{15}$n$_{eq}$cm$^{-2}$ with a hit efficiency of about 99% and a noise occupancy lower than $10^{-6}$ hits in a LHC bunch crossing of 25ns at 150V.
The MuPix7 chip is a monolithic HV-CMOS pixel chip, thinned down to 50 mu m. It provides continuous self-triggered, non-shuttered readout at rates up to 30 Mhits/chip of 3x3 mm^2 active area and a pixel size of 103x80 mu m^2. The hit efficiency depends on the chosen working point. Settings with a power consumption of 300 mW/cm^2 allow for a hit efficiency >99.5%. A time resolution of 14.2 ns (Gaussian sigma) is achieved. Latest results from 2016 test beam campaigns are shown.
High-Voltage Monolithic Active Pixel Sensors (HV-MAPS) based on the 180 nm HV-CMOS process have been proposed to realize thin, fast and highly integrated pixel sensors. The MuPix7 prototype, fabricated in the commercial AMS H18 process, features a fully integrated on-chip readout, i.e. hit-digitization, zero suppression and data serialization. It is the first fully monolithic HV-CMOS pixel sensor that has been tested for the use in high irradiation environments like HL-LHC. We present results from laboratory and test beam measurements of MuPix7 prototypes irradiated with neutrons (up to $5.0cdot10^{15}{,rm{n}_{rm{eq}}/cm^2}$) and protons (up to $7.8cdot 10^{15} ,rm{protons}/cm^2$) and compare the performance with non-irradiated sensors. Efficiencies well above 90 % at noise rates below 200 Hz per pixel are measured. A time resolution better than 22 ns is measured for all tested settings and sensors, even at the highest irradiation fluences. The data transmission at 1.25 Gbit/s and the on-chip PLL remain fully functional.
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