Subscribe to the gold package and get unlimited access to Shamra Academy
Register a new userMuPix7 - A fast monolithic HV-CMOS pixel chip for Mu3e
65
0
0.0
(
0
)
Added by
Frank Meier Aeschbacher
Publication date
2016
fields
Physics
and research's language is
English
Ask ChatGPT about the research
No Arabic abstract
The MuPix7 chip is a monolithic HV-CMOS pixel chip, thinned down to 50 mu m. It provides continuous self-triggered, non-shuttered readout at rates up to 30 Mhits/chip of 3x3 mm^2 active area and a pixel size of 103x80 mu m^2. The hit efficiency depends on the chosen working point. Settings with a power consumption of 300 mW/cm^2 allow for a hit efficiency >99.5%. A time resolution of 14.2 ns (Gaussian sigma) is achieved. Latest results from 2016 test beam campaigns are shown.
rate research
Read More
Monolithic active pixel sensors produced in High Voltage CMOS (HV-CMOS) technology are being considered for High Energy Physics applications due to the ease of production and the reduced costs. Such technology is especially appealing when large areas to be covered and material budget are concerned. This is the case of the outermost pixel layers of the future ATLAS tracking detector for the HL-LHC. For experiments at hadron colliders, radiation hardness is a key requirement which is not fulfilled by standard CMOS sensor designs that collect charge by diffusion. This issue has been addressed by depleted active pixel sensors in which electronics are embedded into a large deep implantation ensuring uniform charge collection by drift. Very first small prototypes of hybrid depleted active pixel sensors have already shown a radiation hardness compatible with the ATLAS requirements. Nevertheless, to compete with the present hybrid solutions a further reduction in costs achievable by a fully monolithic design is desirable. The H35DEMO is a large electrode full reticle demonstrator chip produced in AMS 350 nm HV-CMOS technology by the collaboration of Karlsruher Institut fur Technologie (KIT), Institut de Fisica dAltes Energies (IFAE), University of Liverpool and University of Geneva. It includes two large monolithic pixel matrices which can be operated standalone. One of these two matrices has been characterised at beam test before and after irradiation with protons and neutrons. Results demonstrated the feasibility of producing radiation hard large area fully monolithic pixel sensors in HV-CMOS technology. H35DEMO chips with a substrate resistivity of 200$Omega$ cm irradiated with neutrons showed a radiation hardness up to a fluence of $10^{15}$n$_{eq}$cm$^{-2}$ with a hit efficiency of about 99% and a noise occupancy lower than $10^{-6}$ hits in a LHC bunch crossing of 25ns at 150V.
High-Voltage Monolithic Active Pixel Sensors (HV-MAPS) based on the 180 nm HV-CMOS process have been proposed to realize thin, fast and highly integrated pixel sensors. The MuPix7 prototype, fabricated in the commercial AMS H18 process, features a fully integrated on-chip readout, i.e. hit-digitization, zero suppression and data serialization. It is the first fully monolithic HV-CMOS pixel sensor that has been tested for the use in high irradiation environments like HL-LHC. We present results from laboratory and test beam measurements of MuPix7 prototypes irradiated with neutrons (up to $5.0cdot10^{15}{,rm{n}_{rm{eq}}/cm^2}$) and protons (up to $7.8cdot 10^{15} ,rm{protons}/cm^2$) and compare the performance with non-irradiated sensors. Efficiencies well above 90 % at noise rates below 200 Hz per pixel are measured. A time resolution better than 22 ns is measured for all tested settings and sensors, even at the highest irradiation fluences. The data transmission at 1.25 Gbit/s and the on-chip PLL remain fully functional.
An improved SOI-MAPS (Silicon On Insulator Monolithic Active Pixel Sensor) for ionizing radiation based on thick-film High Voltage SOI technology (HV-SOI) has been developed. Similar to existing Fully Depleted SOI-based (FD-SOI) MAPS, a buried silicon oxide inter-dielectric (BOX) layer is used to separate the CMOS electronics from the handle wafer which is used as a depleted charge collection layer. FD-SOI MAPS suffer from radiation damage such as transistor threshold voltage shifts due to charge traps in the oxide layers and charge states created at the silicon oxide boundaries (back gate effect). The X-FAB 180-nm HV-SOI technology offers an additional isolation by deep non-depleted implant between the BOX layer and the active circuitry witch mitigates this problem. Therefore we see in this technology a high potential to implement radiation-tolerant MAPS with fast charge collection property. The design and measurement results from a first prototype are presented including charge collection in neutron irradiated samples.
An R&D program on monolithic CMOS pixel sensors for application at the ILC has been started at LBNL. This program profits of significant synergies with other R&D activities on CMOS pixel sensors. The project activities after the first semester of the R&D program are reviewed.
The Mu3e experiment is searching for the charged lepton flavour violating decay $ mu^+rightarrow e^+ e^- e^+ $, aiming for an ultimate sensitivity of one in $10^{16}$ decays. In an environment of up to $10^9$ muon decays per second the detector needs to provide precise vertex, time and momentum information to suppress accidental and physics background. The detector consists of cylindrical layers of $50, mutext{m}$ thin High Voltage Monolithic Active Pixel Sensors (HV-MAPS) placed in a $1,text{T}$ magnetic field. The measurement of the trajectories of the decay particles allows for a precise vertex and momentum reconstruction. Additional layers of fast scintillating fibre and tile detectors provide sub-nanosecond time resolution. The MuPix8 chip is the first large scale prototype, proving the scalability of the HV-MAPS technology. It is produced in the AMS aH18 $180, text{nm}$ HV-CMOS process. It consists of three sub-matrices, each providing an untriggered datastream of more than $10,text{MHits}/text{s}$. The latest results from laboratory and testbeam characterisation are presented, showing an excellent performance with efficiencies $>99.6,text{%}$ and a time resolution better than $10, text{ns}$ achieved with time walk correction.
Log in to be able to interact and post comments
comments
Fetching comments
Sign in to be able to follow your search criteria
