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Register a new userA Constituent Codes Oriented Code Construction Scheme for Polar Code-Aim to Reduce the Decoding Latency
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Added by
Tiben Che
Publication date
2016
fields
Informatics Engineering
and research's language is
English
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This paper proposes a polar code construction scheme that reduces constituent-code supplemented decoding latency. Constituent codes are the sub-codewords with specific patterns. They are used to accelerate the successive cancellation decoding process of polar code without any performance degradation. We modify the traditional construction approach to yield increased number of desirable constituent codes that speeds the decoding process. For (n,k) polar code, instead of directly setting the k best and (n-k) worst bits to the information bits and frozen bits, respectively, we swap the locations of some information and frozen bits carefully according to the qualities of their equivalent channels. We conducted the simulation of 1024 and 2048 bits length polar codes with multiple rates and analyzed the decoding latency for various length codes. The numerical results show that the proposed construction scheme generally is able to achieve at least around 20% latency deduction with an negligible loss in gain with carefully selected optimization threshold.
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This work analyzes the latency of the simplified successive cancellation (SSC) decoding scheme for polar codes proposed by Alamdar-Yazdi and Kschischang. It is shown that, unlike conventional successive cancellation decoding, where latency is linear in the block length, the latency of SSC decoding is sublinear. More specifically, the latency of SSC decoding is $O(N^{1-1/mu})$, where $N$ is the block length and $mu$ is the scaling exponent of the channel, which captures the speed of convergence of the rate to capacity. Numerical results demonstrate the tightness of the bound and show that most of the latency reduction arises from the parallel decoding of subcodes of rate $0$ or $1$.
This paper characterizes the latency of the simplified successive-cancellation (SSC) decoding scheme for polar codes under hardware resource constraints. In particular, when the number of processing elements $P$ that can perform SSC decoding operations in parallel is limited, as is the case in practice, the latency of SSC decoding is $Oleft(N^{1-1/mu}+frac{N}{P}log_2log_2frac{N}{P}right)$, where $N$ is the block length of the code and $mu$ is the scaling exponent of the channel. Three direct consequences of this bound are presented. First, in a fully-parallel implementation where $P=frac{N}{2}$, the latency of SSC decoding is $Oleft(N^{1-1/mu}right)$, which is sublinear in the block length. This recovers a result from our earlier work. Second, in a fully-serial implementation where $P=1$, the latency of SSC decoding scales as $Oleft(Nlog_2log_2 Nright)$. The multiplicative constant is also calculated: we show that the latency of SSC decoding when $P=1$ is given by $left(2+o(1)right) Nlog_2log_2 N$. Third, in a semi-parallel implementation, the smallest $P$ that gives the same latency as that of the fully-parallel implementation is $P=N^{1/mu}$. The tightness of our bound on SSC decoding latency and the applicability of the foregoing results is validated through extensive simulations.
Gaussian approximation (GA) is widely used to construct polar codes. However when the code length is long, the subchannel selection inaccuracy due to the calculation error of conventional approximate GA (AGA), which uses a two-segment approximation function, results in a catastrophic performance loss. In this paper, new principles to design the GA approximation functions for polar codes are proposed. First, we introduce the concepts of polarization violation set (PVS) and polarization reversal set (PRS) to explain the essential reasons that the conventional AGA scheme cannot work well for the long-length polar code construction. In fact, these two sets will lead to the rank error of subsequent subchannels, which means the orders of subchannels are misaligned, which is a severe problem for polar code construction. Second, we propose a new metric, named cumulative-logarithmic error (CLE), to quantitatively evaluate the remainder approximation error of AGA in logarithm. We derive the upper bound of CLE to simplify its calculation. Finally, guided by PVS, PRS and CLE bound analysis, we propose new construction rules based on a multi-segment approximation function, which obviously improve the calculation accuracy of AGA so as to ensure the excellent performance of polar codes especially for the long code lengths. Numerical and simulation results indicate that the proposed AGA schemes are critical to construct the high-performance polar codes.
This paper proposes the architecture of partial sum generator for constituent codes based polar code decoder. Constituent codes based polar code decoder has the advantage of low latency. However, no purposefully designed partial sum generator design exists that can yield desired timing for the decoder. We first derive the mathematical presentation with the partial sums set $bm{beta^c}$ which is corresponding to each constituent codes. From this, we concoct a shift-register based partial sum generator. Next, the overall architecture and design details are described, and the overhead compared with conventional partial sum generator is evaluated. Finally, the implementation results with both ASIC and FPGA technology and relevant discussions are presented.
A modification of Koetter-Kschischang codes for random networks is presented (these codes were also studied by Wang et al. in the context of authentication problems). The new codes have higher information rate, while maintaining the same error-correcting capabilities. An efficient error-correcting algorithm is proposed for these codes.
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