No Arabic abstract
Real-space mapping of doping concentration in semiconductor devices is of great importance for the microelectronic industry. In this work, a scanning microwave impedance microscope (MIM) is employed to resolve the local conductivity distribution of a static random access memory (SRAM) sample. The MIM electronics can also be adjusted to the scanning capacitance microscopy (SCM) mode, allowing both measurements on the same region. Interestingly, while the conventional SCM images match the nominal device structure, the MIM results display certain unexpected features, which originate from a thin layer of the dopant ions penetrating through the protective layers during the heavy implantation steps.
Magnetic random access memory schemes employing magnetoelectric coupling to write binary information promise outstanding energy efficiency. We propose and demonstrate a purely antiferromagnetic magnetoelectric random access memory (AF-MERAM) that offers a remarkable 50 fold reduction of the writing threshold compared to ferromagnet-based counterparts, is robust against magnetic disturbances and exhibits no ferromagnetic hysteresis losses. Using the magnetoelectric antiferromagnet Cr2O3, we demonstrate reliable isothermal switching via gate voltage pulses and all-electric readout at room temperature. As no ferromagnetic component is present in the system, the writing magnetic field does not need to be pulsed for readout, allowing permanent magnets to be used. Based on our prototypes of these novel systems, we construct a comprehensive model of the magnetoelectric selection mechanism in thin films of magnetoelectric antiferromagnets. We identify that growth induced effects lead to emergent ferrimagnetism, which is detrimental to the robustness of the storage. After pinpointing lattice misfit as the likely origin, we provide routes to enhance or mitigate this emergent ferrimagnetism as desired. Beyond memory applications, the AF-MERAM concept introduces a general all-electric interface for antiferromagnets and should find wide applicability in purely antiferromagnetic spintronics devices.
Embedded non-volatile memory technologies such as resistive random access memory (RRAM) and spin-transfer torque magnetic RAM (STT MRAM) are increasingly being researched for application in neuromorphic computing and hardware accelerators for AI. However, the stochastic write processes in these memory technologies affect their yield and need to be studied alongside process variations, which drastically increase the complexity of yield analysis using the Monte Carlo approach. Therefore, we propose an approach based on the Fokker-Planck equation for modeling the stochastic write processes in STT MRAM and RRAM devices. Moreover, we show that our proposed approach can reproduce the experimental results for both STT-MRAM and RRAM devices.
Spin-transfer torque magnetoresistive random access memory (STT-MRAM) is an attractive alternative to current random access memory technologies due to its non-volatility, fast operation and high endurance. STT-MRAM does though have limitations including the stochastic nature of the STT-switching and a high critical switching current, which makes it unsuitable for ultrafast operation at nanosecond and sub-nanosecond regimes. Spin-orbit torque (SOT) switching, which relies on the torque generated by an in-plane current, has the potential to overcome these limitations. However, SOT-MRAM cells studied so far use a three-terminal structure in order to apply the in-plane current, which increases the size of the cells. Here we report a two-terminal SOT-MRAM cell based on a CoFeB/MgO magnetic tunnel junction pillar on an ultrathin and narrow Ta underlayer. In this device, an in-plane and out-of-plane current are simultaneously generated upon application of a voltage, and we demonstrate that the switching mechanism is dominated by SOT. We also compare our device to a STT-MRAM cell built with the same architecture and show that critical write current in the SOT-MRAM cell is reduced by more than 70%.
Silicon-based Static Random Access Memories (SRAM) and digital Boolean logic have been the workhorse of the state-of-art computing platforms. Despite tremendous strides in scaling the ubiquitous metal-oxide-semiconductor transistor, the underlying textit{von-Neumann} computing architecture has remained unchanged. The limited throughput and energy-efficiency of the state-of-art computing systems, to a large extent, results from the well-known textit{von-Neumann bottleneck}. The energy and throughput inefficiency of the von-Neumann machines have been accentuated in recent times due to the present emphasis on data-intensive applications like artificial intelligence, machine learning textit{etc}. A possible approach towards mitigating the overhead associated with the von-Neumann bottleneck is to enable textit{in-memory} Boolean computations. In this manuscript, we present an augmented version of the conventional SRAM bit-cells, called textit{the X-SRAM}, with the ability to perform in-memory, vector Boolean computations, in addition to the usual memory storage operations. We propose at least six different schemes for enabling in-memory vector computations including NAND, NOR, IMP (implication), XOR logic gates with respect to different bit-cell topologies $-$ the 8T cell and the 8$^+$T Differential cell. In addition, we also present a novel textit{`read-compute-store} scheme, wherein the computed Boolean function can be directly stored in the memory without the need of latching the data and carrying out a subsequent write operation. The feasibility of the proposed schemes has been verified using predictive transistor models and Monte-Carlo variation analysis.
A promising candidate for universal memory, which would involve combining the most favourable properties of both high-speed dynamic random access memory (DRAM) and non-volatile flash memory, is resistive random access memory (ReRAM). ReRAM is based on switching back and forth from a high-resistance state (HRS) to a low-resistance state (LRS). ReRAM cells are small, allowing for the creation of memory on the scale of terabits. One of the most promising materials for use as the active medium in resistive memory is hafnia (HfO$_2$). However, an unresolved physics is the nature of defects and traps that are responsible for the charge transport in HRS state of resistive memory. In this study, we demonstrated experimentally and theoretically that oxygen vacancies are responsible for the HRS charge transport in resistive memory elements based on HfO$_2$. We also demonstrated that LRS transport occurs through a mechanism described according to percolation theory. Based on the model of multiphonon tunneling between traps, and assuming that the electron traps are oxygen vacancies, good quantitative agreement between the experimental and theoretical data of current-voltage characteristics were achieved. The thermal excitation energy of the traps in hafnia was determined based on the excitation spectrum and luminescence of the oxygen vacancies. The findings of this study demonstrate that in resistive memory elements using hafnia, the oxygen vacancies in hafnia play a key role in creating defects in HRS charge transport.