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Register a new userAn experimental proof that resistance-switching memories are not memristors
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It has been suggested that all resistive-switching memory cells are memristors. The latter are hypothetical, ideal devices whose resistance, as originally formulated, depends only on the net charge that traverses them. Recently, an unambiguous test has been proposed [J. Phys. D: Appl. Phys. {bf 52}, 01LT01 (2019)] to determine whether a given physical system is indeed a memristor or not. Here, we experimentally apply such a test to both in-house fabricated Cu-SiO2 and commercially available electrochemical metallization cells. Our results unambiguously show that electrochemical metallization memory cells are not memristors. Since the particular resistance-switching memories employed in our study share similar features with many other memory cells, our findings refute the claim that all resistance-switching memories are memristors. They also cast doubts on the existence of ideal memristors as actual physical devices that can be fabricated experimentally. Our results then lead us to formulate two memristor impossibility conjectures regarding the impossibility of building a model of physical resistance-switching memories based on the memristor model.
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The possibility of in-memory computing with volatile memristive devices, namely, memristors requiring a power source to sustain their memory, is demonstrated. We have adopted a hysteretic graphene-based field emission structure as a prototype of volatile memristor, which is characterized by a non-pinched hysteresis loop. Memristive model of the structure is developed and used to simulate a polymorphic circuit implementing in-memory computing gates such as the material implication. Specific regions of parameter space realizing useful logic functions are identified. Our results are applicable to other realizations of volatile memory devices.
Efficient generation of spin currents from charge currents is of high importance for memory and logic applications of spintronics. In particular, generation of spin currents from charge currents in high spin-orbit coupling metals has the potential to provide a scalable solution for embedded memory. We demonstrate a net reduction in critical charge current for spin torque driven magnetization reversal via using spin-orbit mediated spin current generation. We scaled the dimensions of the spin-orbit electrode to 400 nm and the nanomagnet to 270 nm x 68 nm in a three terminal spin-orbit torque, magnetic tunnel junction (SOT-MTJ) geometry. Our estimated effective spin Hall angle is 0.15-0.20 using the ratio of zero temperature critical current from spin Hall switching and estimated spin current density for switching the magnet. We show bidirectional transient switching using spin-orbit generated spin torque at 100 ns switching pulses reliably followed by transient read operations. We finally compare the static and dynamic response of the SOT-MTJ with transient spin circuit modeling showing the performance of scaled SOT-MTJs to enable nanosecond class non-volatile MTJs.
A simple and unambiguous test has been recently suggested [J. Phys. D: Applied Physics, 52, 01LT01 (2018)] to check experimentally if a resistor with memory is indeed a memristor, namely a resistor whose resistance depends only on the charge that flows through it, or on the history of the voltage across it. However, although such a test would represent the litmus test for claims about memristors (in the ideal sense), it has yet to be applied widely to actual physical devices. In this paper, we experimentally apply it to a current-carrying wire interacting with a magnetic core, which was recently claimed to be a memristor (so-called `$Phi$ memristor) [J. Appl. Phys. 125, 054504 (2019)]. The results of our experiment demonstrate unambiguously that this `$Phi$ memristor is not a memristor: it is simply an inductor with memory. This demonstration casts further doubts that ideal memristors do actually exist in nature or may be easily created in the lab.
While the recent establishment of the role of thermophoresis/diffusion-driven oxygen migration during resistance switching in metal oxide memristors provided critical insights required for memristor modeling, extended investigations of the role of oxygen migration during ageing and failure remain to be detailed. Such detailing will enable failure-tolerant design, which can lead to enhanced performance of memristor-based next-generation storage-class memory. Here we directly observed lateral oxygen migration using in-situ synchrotron x-ray absorption spectromicroscopy of HfOx memristors during initial resistance switching, wear over millions of switching cycles, and eventual failure, through which we determined potential physical causes of failure. Using this information, we reengineered devices to mitigate three failure mechanisms, and demonstrated an improvement in endurance of about three orders of magnitude.
While two-terminal HfOX (x<2) memristor devices have been studied for ion transport and current evolution, there have been limited reports on the effect of the long-range thermal environment on their performance. In this work, amorphous-HfOX based memristor devices on two different substrates, thin SiO2(280 nm)/Si and glass, with different thermal conductivities in the range from 1.2 to 138 W/m-K were fabricated. Devices on glass substrates exhibit lower reset voltage, wider memory window and, in turn, a higher performance window. In addition, the devices on glass show better endurance than the devices on the SiO2/Si substrate. These devices also show non-volatile multi-level resistances at relatively low operating voltages which is critical for neuromorphic computing applications. A Multiphysics COMSOL computational model is presented that describes the transport of heat, ions and electrons in these structures. The combined experimental and COMSOL simulation results indicate that the long-range thermal environment can have a significant impact on the operation of HfOx-based memristors and that substrates with low thermal conductivity can enhance switching performance.
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