No Arabic abstract
Phase change memory (PCM) is an emerging data storage technology, however its programming is thermal in nature and typically not energy-efficient. Here we reduce the switching power of PCM through the combined approaches of filamentary contacts and thermal confinement. The filamentary contact is formed through an oxidized TiN layer on the bottom electrode, and thermal confinement is achieved using a monolayer semiconductor interface, three-atom thick MoS2. The former reduces the switching volume of the phase change material and yields a 70% reduction in reset current versus typical 150 nm diameter mushroom cells. The enhanced thermal confinement achieved with the ultra-thin (~6 {AA}) MoS2 yields an additional 30% reduction in switching current and power. We also use detailed simulations to show that further tailoring the electrical and thermal interfaces of such PCM cells toward their fundamental limits could lead up to a six-fold benefit in power efficiency.
Phase-change memory devices have found applications in in-memory computing where the physical attributes of these devices are exploited to compute in place without the need to shuttle data between memory and processing units. However, non-idealities such as temporal variations in the electrical resistance have a detrimental impact on the achievable computational precision. To address this, a promising approach is projecting the phase configuration of phase change material onto some stable element within the device. Here we investigate the projection mechanism in a prominent phase-change memory device architecture, namely mushroom-type phase-change memory. Using nanoscale projected Ge2Sb2Te5 devices we study the key attributes of state-dependent resistance, drift coefficients, and phase configurations, and using them reveal how these devices fundamentally work.
Two-dimensional MoS2 has emerged as promising material for nanoelectronics and spintronics due to its exotic properties. However, high contact resistance at metal semiconductor MoS2 interface still remains an open issue. Here, we report electronic properties of field effect transistor devices using monolayer MoS2 channels and permalloy (Py) as ferromagnetic (FM) metal contacts. Monolayer MoS2 channels were directly grown on SiO2/Si substrate via chemical vapor deposition technique. The increase in current with back gate voltage shows the tunability of FET characteristics. The Schottky barrier height (SBH) estimated for Py/MoS2 contacts is found to be +28.8 meV (zero-bias), which is the smallest value reported so-far for any direct metal (magnetic or non-magnetic)/monolayer MoS2 contact. With the application of gate voltage (+10 V), SBH shows a drastic reduction down to a value of -6.8 meV. The negative SBH reveals ohmic behavior of Py/MoS2 contacts. Low SBH with controlled ohmic nature of FM contacts is a primary requirement for MoS2 based spintronics and therefore using directly grown MoS2 channels in the present study can pave a path towards high performance devices for large scale applications.
Layering two-dimensional van der Waals materials provides unprecedented control over atomic placement, which could enable tailoring of vibrational spectra and heat flow at the sub-nanometer scale. Here, using spatially-resolved ultrafast thermoreflectance and spectroscopy, we uncover the design rules governing cross-plane heat transport in superlattices assembled from monolayers of graphene (G) and MoS2 (M). Using a combinatorial experimental approach, we probe nine different stacking sequences: G, GG, MG, GGG, GMG, GGMG, GMGG, GMMG, GMGMG and identify the effects of vibrational mismatch, interlayer adhesion, and junction asymmetry on thermal transport. Pure G sequences display signatures of quasi-ballistic transport, whereas adding even a single M layer strongly disrupts heat conduction. The experimental data are described well by molecular dynamics simulations which include thermal expansion, accounting for the effect of finite temperature on the interlayer spacing. The simulations show that a change of only 1.5% in the layer separation can lead to a nearly 100% increase of the thermal resistance. Using these design rules, we experimentally demonstrate a 5-layer GMGMG superlattice with an ultralow effective cross-plane thermal conductivity comparable to air, paving the way for a new class of thermal metamaterials with extreme properties.
We model electrical conductivity in metastable amorphous $Ge_{2}Sb_{2}Te_{5}$ using independent contributions from temperature and electric field to simulate phase change memory devices and Ovonic threshold switches. 3D, 2D-rotational, and 2D finite element simulations of pillar cells capture threshold switching and show filamentary conduction in the on-state. The model can be tuned to capture switching fields from ~5 to 40 MV/m at room temperature using the temperature dependent electrical conductivity measured for metastable amorphous GST; lower and higher fields are obtainable using different temperature dependent electrical conductivities. We use a 2D fixed out-of-plane-depth simulation to simulate an Ovonic threshold switch in series with a $Ge_{2}Sb_{2}Te_{5}$ phase change memory cell to emulate a crossbar memory element. The simulation reproduces the pre-switching current and voltage characteristics found experimentally for the switch + memory cell, isolated switch, and isolated memory cell.
We report on experimental investigation of thermal contact resistance of the noncuring graphene thermal interface materials with the surfaces characterized by different degree of roughness. It is found that the thermal contact resistance depends on the graphene loading non-monotonically, achieving its minimum at the loading fraction of ~15 wt.%. Increasing the surface roughness by ~1 micrometer results in approximately the factor of x2 increase in the thermal contact resistance for this graphene loading. The obtained dependences of the thermal conductivity, thermal contact resistance, and the total thermal resistance of the thermal interface material layer on the graphene loading and surface roughness indicate the need for optimization of the loading fraction for specific materials and roughness of the connecting surfaces. Our results are important for developing graphene technologies for thermal management of high-power-density electronics.