Do you want to publish a course? Click here

Mechanical stress dependence of the Fermi level pinning on an oxidized silicon surface

66   0   0.0 ( 0 )
 Added by Alistair Rowe
 Publication date 2018
  fields Physics
and research's language is English




Ask ChatGPT about the research

A combination of micro-Raman spectroscopy and micro-XPS (X-ray photo-electron spectroscopy) mapping on statically deflected p-type silicon cantilevers is used to study the mechanical stress dependence of the Fermi level pinning at an oxidized silicon (001) surface. With uniaxial compressive and tensile stress applied parallel to the $langle$110$rangle$ crystal direction, the observations are relevant to the electronic properties of strain-silicon nano-devices with large surface-to-volume ratios such as nanowires and nanomembranes. The surface Fermi level pinning is found to be even in applied stress, a fact that may be related to the symmetry of the Pb$_0$ silicon/oxide interface defects. For stresses up to 160 MPa, an increase in the pinning energy of 0.16 meV/MPa is observed for compressive stress, while for tensile stress it increases by 0.11 meV/MPa. Using the bulk, valence band deformation potentials the reduction in surface band bending in compression (0.09 meV/MPa) and in tension (0.13 meV/MPa) can be estimated.



rate research

Read More

The physical origin of Fermi level pinning (FLP) at metal/Ge interfaces has been argued over a long period. Using the Fe$_{3}$Si/Ge(111) heterostructure developed originally, we can explore electrical transport properties through atomically matched metal/Ge junctions. Unlike the conventional metal/$p$-Ge junctions reported so far, we clearly observe rectifying current-voltage characteristics with a measurable Schottky barrier height, depending on the contact area of the Fe$_{3}$Si/Ge(111) junction. These results indicate that one should distinguish between intrinsic and extrinsic mechanisms for discussing the formation of the Schottky barrier at metal/Ge interfaces. This study will be developed for understanding FLP for almost all the metal/semiconductor interfaces.
In 2D-semiconductor-based field-effect transistors and optoelectronic devices, metal-semiconductor junctions are one of the crucial factors determining device performance. The Fermi-level (FL) pinning effect, which commonly caused by interfacial gap states, severely limits the tunability of junction characteristics, including barrier height and contact resistance. A tunneling contact scheme has been suggested to address the FL pinning issue in metal-2D-semiconductor junctions, whereas the experimental realization is still elusive. Here, we show that an oxidized-monolayer-enabled tunneling barrier can realize a pronounced FL depinning in indium selenide (InSe) transistors, exhibiting a large pinning factor of 0.5 and a highly modulated Schottky barrier height. The FL depinning can be attributed to the suppression of metal- and disorder-induced gap states as a result of the high-quality tunneling contacts. Structural characterizations indicate uniform and atomically thin surface oxidation layer inherent from nature of van der Waals materials and atomically sharp oxide-2D-semiconductor interfaces. Moreover, by effectively lowering the Schottky barrier height, we achieve an electron mobility of 2160 cm$^2$/Vs and a contact barrier of 65 meV in two-terminal InSe transistors. The realization of strong FL depinning in high-mobility InSe transistors with the oxidized monolayer presents a viable strategy to exploit layered semiconductors in contact engineering for advanced electronics and optoelectronics.
Graphene based transistors relying on a conventional structure cannot switch properly because of the absence of an energy gap in graphene. To overcome this limitation, a barristor device was proposed, whose operation is based on the modulation of the graphene-semiconductor (GS) Schottky barrier by means of a top gate, and demonstrating an ON-OFF current ratio up to $10^5$. Such a large number is likely due to the realization of an ultra clean interface with virtually no interface trapped charge. However, it is indeed technologically relevant to know the impact that the interface trapped charges might have on the barristors electrical properties. We have developed a physics based model of the gate tunable GS heterostructure where non-idealities such as Fermi Level Pinning (FLP) and a bias dependent barrier lowering effect has been considered. Using the model we have made a comprehensive study of the barristors expected digital performance.
Magnetic nanostructures are often considered as highly functional materials because they exhibit unusual magnetic properties under different external conditions. We study the effect of surface pinning on the core-shell magnetic nanostuctures of different shapes and sizes considering the spin-interaction to be Ising-like. We explore the hysteresis properties and find that the exchange bias, even under zero field cooled conditions, increases with increase of, the pinning density and the fraction of up-spins among the pinned ones. We explain these behavior analytically by introducing a simple model of the surface. The asymmetry in hysteresis is found to be more prominent in a inverse core-shell structure, where spin interaction in the core is antiferromagnetic and that in the shell is ferromagnetic. These studied of inverse core-shell structure are extended to different shapes, sizes, and different spin interactions, namely Ising, XY- and Heisenberg models in three dimension. We also briefly discuss the pinning effects on magnetic heterostructures.
It is demonstrated that the electric dipole layer due to the overlapping of electron wavefunctions at metal/graphene contact results in negative Fermi-level pinning effect on the region of GaAs surface with low interface-trap density in metal/graphene/n-GaAs(001) junction. The graphene interlayer takes a role of diffusion barrier preventing the atomic intermixing at interface and preserving the low interface-trap density region. The negative Fermi-level pinning effect is supported by the Schottky barrier decreasing as metal work-function increasing. Our work shows that the graphene interlayer can invert the effective work-function of metal between $high$ and $low$, making it possible to form both Schottky and Ohmic-like contacts with identical (particularly $high$ work-function) metal electrodes on a semiconductor substrate possessing low surface-state density.
comments
Fetching comments Fetching comments
Sign in to be able to follow your search criteria
mircosoft-partner

هل ترغب بارسال اشعارات عن اخر التحديثات في شمرا-اكاديميا