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Register a new userPerformance of CMOS pixel sensor prototypes in ams H35 and aH18 technology for the ATLAS ITk upgrade
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Pixel sensors based on commercial high-voltage CMOS processes are an exciting technology that is considered as an option for the outer layer of the ATLAS inner tracker upgrade at the High Luminosity LHC. Here, charged particles are detected using deep n-wells as sensor diodes with the depleted region extending into the silicon bulk. Both analog and digital readout electronics can be added to achieve different levels of integration up to a fully monolithic sensor. Small scale prototypes using the ams CMOS technology have previously demonstrated that it can achieve the required radiation tolerance of $10^{15}~text{n}_text{eq}/text{cm}^2$ and detection efficiencies above $99.5~%$. Recently, large area prototypes, comparable in size to a full sensor, have been produced that include most features required towards a final design: the H35demo prototype produced in ams H35 technology that supports both external and integrated readout and the monolithic ATLASPix1 pre-production design produced in ams aH18 technology. Both chips are based on large fill-factor pixel designs, but differ in readout structure. Performance results for H35DEMO with capacitively-coupled external readout and first results for the monolithic ATLASPix1 are shown.
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Monolithic active pixel sensors produced in High Voltage CMOS (HV-CMOS) technology are being considered for High Energy Physics applications due to the ease of production and the reduced costs. Such technology is especially appealing when large areas to be covered and material budget are concerned. This is the case of the outermost pixel layers of the future ATLAS tracking detector for the HL-LHC. For experiments at hadron colliders, radiation hardness is a key requirement which is not fulfilled by standard CMOS sensor designs that collect charge by diffusion. This issue has been addressed by depleted active pixel sensors in which electronics are embedded into a large deep implantation ensuring uniform charge collection by drift. Very first small prototypes of hybrid depleted active pixel sensors have already shown a radiation hardness compatible with the ATLAS requirements. Nevertheless, to compete with the present hybrid solutions a further reduction in costs achievable by a fully monolithic design is desirable. The H35DEMO is a large electrode full reticle demonstrator chip produced in AMS 350 nm HV-CMOS technology by the collaboration of Karlsruher Institut fur Technologie (KIT), Institut de Fisica dAltes Energies (IFAE), University of Liverpool and University of Geneva. It includes two large monolithic pixel matrices which can be operated standalone. One of these two matrices has been characterised at beam test before and after irradiation with protons and neutrons. Results demonstrated the feasibility of producing radiation hard large area fully monolithic pixel sensors in HV-CMOS technology. H35DEMO chips with a substrate resistivity of 200$Omega$ cm irradiated with neutrons showed a radiation hardness up to a fluence of $10^{15}$n$_{eq}$cm$^{-2}$ with a hit efficiency of about 99% and a noise occupancy lower than $10^{-6}$ hits in a LHC bunch crossing of 25ns at 150V.
In the context of the studies of the ATLAS High Luminosity LHC programme, radiation tolerant pixel detectors in CMOS technologies are investigated. To evaluate the effects of substrate resistivity on CMOS sensor performance, the H35DEMO demonstrator, containing different diode and amplifier designs, was produced in ams H35 HV-CMOS technology using four different substrate resistivities spanning from $mathrm{80}$ to $mathrm{1000~Omega cdot cm}$. A glueing process using a high-precision flip-chip machine was developed in order to capacitively couple the sensors to FE-I4 Readout ASIC using a thin layer of epoxy glue with good uniformity over a large surface. The resulting assemblies were measured in beam test at the Fermilab Test Beam Facilities with 120 GeV protons and CERN SPS H8 beamline using 80 GeV pions. The in-time efficiency and tracking properties measured for the different sensor types are shown to be compatible with the ATLAS ITk requirements for its pixel sensors.
HV-CMOS pixel sensors are a promising option for the tracker upgrade of the ATLAS experiment at the LHC, as well as for other future tracking applications in which large areas are to be instrumented with radiation-tolerant silicon pixel sensors. We present results of testbeam characterisations of the $4^{mathrm{th}}$ generation of Capacitively Coupled Pixel Detectors (CCPDv4) produced with the ams H18 HV-CMOS process that have been irradiated with different particles (reactor neutrons and 18 MeV protons) to fluences between $1cdot 10^{14}$ and $5cdot 10^{15}$ 1-MeV-n$_textrm{eq}$/cm$^2$. The sensors were glued to ATLAS FE-I4 pixel readout chips and measured at the CERN SPS H8 beamline using the FE-I4 beam telescope. Results for all fluences are very encouraging with all hit efficiencies being better than 97% for bias voltages of $85,$V. The sample irradiated to a fluence of $1cdot 10^{15}$ n$_textrm{eq}$/cm$^2$ - a relevant value for a large volume of the upgraded tracker - exhibited 99.7% average hit efficiency. The results give strong evidence for the radiation tolerance of HV-CMOS sensors and their suitability as sensors for the experimental HL-LHC upgrades and future large-area silicon-based tracking detectors in high-radiation environments.
This work presents a depleted monolithic active pixel sensor (DMAPS) prototype manufactured in the LFoundry 150,nm CMOS process. DMAPS exploit high voltage and/or high resistivity inclusion of modern CMOS technologies to achieve substantial depletion in the sensing volume. The described device, named LF-Monopix, was designed as a proof of concept of a fully monolithic sensor capable of operating in the environment of outer layers of the ATLAS Inner Tracker upgrade in 2025 for the High Luminosity Large Hadron Collider (HL-LHC). This type of devices has a lower production cost and lower material budget compared to presently used hybrid designs. In this work, the chip architecture will be described followed by the characterization of the different pre-amplifier and discriminator flavors with an external injection signal and an iron source (5.9,keV x-rays).
The Mu3e experiment is searching for the charged lepton flavour violating decay $ mu^+rightarrow e^+ e^- e^+ $, aiming for an ultimate sensitivity of one in $10^{16}$ decays. In an environment of up to $10^9$ muon decays per second the detector needs to provide precise vertex, time and momentum information to suppress accidental and physics background. The detector consists of cylindrical layers of $50, mutext{m}$ thin High Voltage Monolithic Active Pixel Sensors (HV-MAPS) placed in a $1,text{T}$ magnetic field. The measurement of the trajectories of the decay particles allows for a precise vertex and momentum reconstruction. Additional layers of fast scintillating fibre and tile detectors provide sub-nanosecond time resolution. The MuPix8 chip is the first large scale prototype, proving the scalability of the HV-MAPS technology. It is produced in the AMS aH18 $180, text{nm}$ HV-CMOS process. It consists of three sub-matrices, each providing an untriggered datastream of more than $10,text{MHits}/text{s}$. The latest results from laboratory and testbeam characterisation are presented, showing an excellent performance with efficiencies $>99.6,text{%}$ and a time resolution better than $10, text{ns}$ achieved with time walk correction.
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