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Register a new userThe Design and Testing of the Address in Real Time Data Driver Card for the Micromegas Detector of the ATLAS New Small Wheel Upgrade
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The Address in Real Time Data Driver Card (ADDC) is designed to transmit the trigger data in the Micromegas detector of the ATLAS New Small Wheel (NSW) upgrade. The ART signals are generated by the front end ASIC, named VMM chip, to indicate the address of the first above-threshold event. A custom ASIC (ART ASIC) is designed to receive the ART signals from the VMM chip and do the hit-selection processing. Processed data from ART ASIC will be transmitted out of the NSW detector through GBTx serializer, VTTx optical transmitter module and fiber optical links. The ART signal is critical for the ATLAS experiment trigger selection thus the functionality and stability of the ADDC is very important. To ensure extensive testing of the ADDC, an FMC based testing platform and special firmware/software are developed. This test platform works with the commercial Xilinx VC707 FPGA develop kit, even without the other electronics of the NSW it can test all the functionality of the ADDC and also long term stability. This paper will introduce the design, testing procedure and results from the ADDC and the FMC testing platform.
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The MicroMegas technology was selected by the ATLAS experiment at CERN to be adopted for the Small Wheel upgrade of the Muon Spectrometer, dedicated to precision tracking, in order to meet the requirements of the upcoming luminosity upgrade of the Large Hadron Collider. A large surface of the forward regions of the Muon Spectrometer will be equipped with 8 layers of MicroMegas modules forming a total active area of $1200,m^{2}$. The New Small Wheel is scheduled to be installed in the forward region of $1.3<vert eta vert <2.7$ of the ATLAS detector during the second long shutdown of the Large Hadron Collider. The New Small Wheel will have to operate in a high background radiation environment, while reconstructing muon tracks as well as furnishing information for the Level-1 trigger. The project requires fully efficient MicroMegas chambers with spatial resolution down to $100,{mu}m$, a rate capability up to about $15,kHz/cm^{2}$ and operation in a moderate (highly inhomogeneous) magnetic field up to $B=0.3,T$. The required tracking is linked to the intrinsic spatial resolution in combination with the demanding mechanical accuracy. An overview of the design, construction and assembly procedures of the MicroMegas modules will be reported.
This paper presents a readout system designed for testing the prototype of Small-Strip Thin Gap Chamber (sTGC), which is one of the main detector technologies used for ATLAS New-Small-Wheel Upgrade. This readout system aims at testing one full-size sTGC quadruplet with cosmic muon triggers.
The instantaneous luminosity of the Large Hadron Collider at CERN will be increased up to a factor of five with respect to the present design value by undergoing an extensive upgrade program over the coming decade. The most important upgrade project for the ATLAS Muon System is the replacement of the present first station in the forward regions with the so-called New Small Wheels (NSWs). The NSWs will be installed during the LHC long shutdown in 2018/19. Small-Strip Thin Gap Chamber (sTGC) detectors are designed to provide fast trigger and high precision muon tracking under the high luminosity LHC conditions. To validate the design, a full-size prototype sTGC detector of approximately 1.2 $times$ $1.0, mathrm{m}^2$ consisting of four gaps has been constructed. Each gap provides pad, strip and wire readouts. The sTGC intrinsic spatial resolution has been measured in a $32, mathrm{GeV}$ pion beam test at Fermilab. At perpendicular incidence angle, single gap position resolutions of about $50,mathrm{mu m}$ have been obtained, uniform along the sTGC strip and perpendicular wire directions, well within design requirements. Pad readout measurements have been performed in a $130, mathrm{GeV}$ muon beam test at CERN. The transition region between readout pads has been found to be $4,mathrm{mm}$, and the pads have been found to be fully efficient.
The second phase of the T2K experiment is expected to start data taking in autumn 2022. An upgrade of the Near Detector (ND280) is under development and includes the construction of two new Time Projection Chambers called High-Angle TPC (HA-TPC). The two endplates of these TPCs will be paved with eight Micromegas type charge readout modules. The Micromegas detector charge amplification structure uses a resistive anode to spread the charges over several pads to improve the space point resolution. This innovative technique is combined with the bulk-Micromegas technology to compose the Encapsulated Resistive Anode Micromegas detector. A prototype has been designed, built and exposed to an electron beam at the DESY II test beam facility. The data have been used to characterize the charge spreading and to produce a RC map. Spatial resolution better than 600 $mu$m and energy resolution better than 9% are obtained for all incident angles. These performances fulfil the requirements for the upgrade of the ND280 TPC.
The steadily increasing luminosity of the LHC requires an upgrade with high-rate and high-resolution detector technology for the inner end cap of the ATLAS muon spectrometer: the New Small Wheels (NSW). In order to achieve the goal of precision tracking at a hit rate of about 15 kHz/cm$^2$ at the inner radius of the NSW, large area Micromegas quadruplets with 100,microns spatial resolution per plane have been produced. % IRFU, from the CEA research center of Saclay, is responsible for the production and validation of LM1 Micromegas modules. The construction, production, qualification and validation of the largest Micromegas detectors ever built are reported here. Performance results under cosmic muon characterisation will also be discussed.
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