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Register a new userMultichannel FPGA based MVT system for high precision time (20~ps~RMS) and charge measurement
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In this article it is presented an FPGA based $M$ulti-$V$oltage $T$hreshold (MVT) system which allows of sampling fast signals ($1-2$ ns rising and falling edge) in both voltage and time domain. It is possible to achieve a precision of time measurement of $20$ ps RMS and reconstruct charge of signals, using a simple approach, with deviation from real value smaller than 10$%$. Utilization of the differential inputs of an FPGA chip as comparators together with an implementation of a TDC inside an FPGA allowed us to achieve a compact multi-channel system characterized by low power consumption and low production costs. This paper describes realization and functioning of the system comprising 192-channel TDC board and a four mezzanine cards which split incoming signals and discriminate them. The boards have been used to validate a newly developed Time-of-Flight Positron Emission Tomography system based on plastic scintillators. The achieved full system time resolution of $sigma$(TOF) $approx 68$ ps is by factor of two better with respect to the current TOF-PET systems.
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In order to reconstruct gamma-gamma physics events tagged with High Energy Tagger (HET) in the KLOE-2 (K LOng Experiment 2), we need to measure the Time Of Flight (TOF) of the electrons and positrons from the KLOE-2 Interaction Point (IP) to our tagging stations (11 m apart). The required resolution must be better than the bunch spacing (2.7 ns). We have developed and implemented on a Xilinx Virtex-5 FPGA a Time to Digital Converter (TDC) with 625 ps resolution (LSB) along with an embedded data acquisition system and the interface to the online FARM of KLOE-2. We will describe briefly the architecture of the TDC and of the Data AcQuisition (DAQ) system. Some more details will be provided about the zero-suppression algorithm used to reduce the data throughput.
A prototype of DIRC-like Time-of-Flight detector (DTOF), including a pico-second time measurement electronics, is developed and tested preliminarily. The basic structure of DTOF is composed of a fused silica radiator connected to fast micro-channel plate PMTs (MCP-PMT), and readout by a dedicated FPGA (Field Programmable Gate Array) based front-end electronics. The full electronics chain consists of a programmable differential amplifier, a dual-threshold differential discriminator, and a timestamp Time-to-Digital convertor. By splitting a MCP-PMT output signal into two identical electronics chains, the coincidence time resolution (CTR) of pure electronics was measured as 5.6 ps. By the beam test in H4 (150GeV/c, Muon) at CERN, the intrinsic CTR of the whole detector prototype reaches 15.0 ps without using time-amplitude correction. The test results demonstrate that the FPGA based front-end electronics could achieve an excellent time performance for TOF detectors. It is very compact, cost effective with a high multi-channel capacity and short measurement dead time, which is very suitable for practical applications of large-scale high performance TOF detectors in particle physics spectrometer.
Time to Digital Converters (TDCs) are very common devices in particles physics experiments. A lot of off-the-shelf TDCs can be employed but the necessity of a custom DAta acQuisition (DAQ) system makes the TDCs implemented on the Field-Programmable Gate Arrays (FPGAs) desirable. Most of the architectures developed so far are based on the tapped delay lines with precision down to 10 ps, obtained with high FPGA resources usage and non-linearity issues to be managed. Often such precision is not necessary; in this case TDC architectures with low resources occupancy are preferable allowing the implementation of data processing systems and of other utilities on the same device. In order to reconstruct gamma-gamma physics events tagged with High Energy Tagger (HET) in the KLOE-2 (K LOng Experiment 2), we need to measure the Time Of Flight (TOF) of the electrons and positrons from the KLOE-2 Interaction Point (IP) to our tagging stations (11 m apart). The required resolution must be better than the bunch spacing (2.7 ns). We have developed and implemented on a Xilinx Virtex-5 FPGA a 32 channel TDC with a precision of 255 ps and low non-linearity effects along with an embedded data acquisition systems and the interface to the online FARM of KLOE-2.
A fully digital beam position and phase measurement (BPPM) system was designed for the linear accelerator (LINAC) in Accelerator Driven Sub-critical System (ADS) in China. Phase information is obtained from the summed signals from four pick-ups of the Beam Position Monitor (BPM). Considering that the delay variations of different analog circuit channels would introduce phase measurement errors, we propose a new method to tune the digital waveforms of four channels before summation and achieve real-time error correction. The process is based on the vector rotation method and implemented within one single Field Programmable Gate Array (FPGA) device. Tests were conducted to evaluate this correction method and the results indicate that a phase correction precision better than +/- 0.3 degree over the dynamic range from -60 dBm to 0 dBm is achieved.
The fission Time Projection Chamber (fissionTPC) is a compact (15 cm diameter) two-chamber MICROMEGAS TPC designed to make precision cross section measurements of neutron-induced fission. The actinide targets are placed on the central cathode and irradiated with a neutron beam that passes axially through the TPC inducing fission in the target. The 4$pi$ acceptance for fission fragments and complete charged particle track reconstruction are powerful features of the fissionTPC which will be used to measure fission cross sections and examine the associated systematic errors. This paper provides a detailed description of the design requirements, the design solutions, and the initial performance of the fissionTPC.
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