Petabytes of data are to be processed and stored requiring millions of CPU-years in high energy particle (HEP) physics event simulation. This enormous demand is handled in worldwide distributed computing centers as part of the LHC computing grid. These significant resources require a high quality and efficient production and the early detection of potential errors. In this article we present novel monitoring techniques in a Grid environment to collect quality measures during job execution. This allows online assessment of data quality information to avoid configuration errors or inappropriate settings of simulation parameters and therefore is able to save time and resources.
Interest in parallel architectures applied to real time selections is growing in High Energy Physics (HEP) experiments. In this paper we describe performance measurements of Graphic Processing Units (GPUs) and Intel Many Integrated Core architecture (MIC) when applied to a typical HEP online task: the selection of events based on the trajectories of charged particles. We use as benchmark a scaled-up version of the algorithm used at CDF experiment at Tevatron for online track reconstruction - the SVT algorithm - as a realistic test-case for low-latency trigger systems using new computing architectures for LHC experiment. We examine the complexity/performance trade-off in porting existing serial algorithms to many-core devices. Measurements of both data processing and data transfer latency are shown, considering different I/O strategies to/from the parallel devices.
As a concern with the reliability, bandwidth and mass of future optical links in LHC experiments, we are investigating CW lasers and light modulators as an alternative to VCSELs. These links will be particularly useful if they utilize light modulators which are very small, low power, high bandwidth, and are very radiation hard. We have constructed a test system with 3 such links, each operating at 10 Gb/s. We present the quality of these links (jitter, rise and fall time, BER) and eye mask margins (10GbE) for 3 different types of modulators: LiNbO3-based, InP-based, and Si-based. We present the results of radiation hardness measurements with up to ~1012 protons/cm2 and ~65 krad total ionizing dose (TID), confirming no single event effects (SEE) at 10 Gb/s with either of the 3 types of modulators. These optical links will be an integral part of intelligent tracking systems at various scales from coupled sensors through intra-module and off detector communication. We have used a Si-based photonic transceiver to build a complete 40 Gb/s bi-directional link (10 Gb/s in each of four fibers) for a 100m run and have characterized it to compare with standard VCSEL-based optical links. Some future developments of optical modulator-based high bandwidth optical readout systems, and applications based on both fiber and free space data links, such as local triggering and data readout and trigger-clock distribution, are also discussed.
The CALICE Semi-Digital Hadron Calorimeter (SDHCAL) technological prototype is a sampling calorimeter using Glass Resistive Plate Chamber detectors with a three-threshold readout as the active medium. This technology is one of the two options proposed for the hadron calorimeter of the International Large Detector for the International Linear Collider. The prototype was exposed to beams of muons, electrons and pions of different energies at the CERN Super Proton Synchrotron. To be able to study the performance of such a calorimeter in future experiments it is important to ensure reliable simulation of its response. In this paper we present our prototype simulation performed with GEANT4 and the digitization procedure achieved with an algorithm called SimDigital. A detailed description of this algorithm is given and the methods to determinate its parameters using muon tracks and electromagnetic showers are explained. The comparison with hadronic shower data shows a good agreement up to 50 GeV. Discrepancies are observed at higher energies. The reasons for these differences are investigated.
The reports collected in these proceedings have been presented in the third French-Ukrainian workshop on the instrumentation developments for high-energy physics held at LAL, Orsay on October 15-16. The workshop was conducted in the scope of the IDEATE International Associated Laboratory (LIA). Joint developments between French and Ukrainian laboratories and universities as well as new proposals have been discussed. The main topics of the papers presented in the Proceedings are developments for accelerator and beam monitoring, detector developments, joint developments for large-scale high-energy and astroparticle physics projects, medical applications.
Monolithic active pixel sensors produced in High Voltage CMOS (HV-CMOS) technology are being considered for High Energy Physics applications due to the ease of production and the reduced costs. Such technology is especially appealing when large areas to be covered and material budget are concerned. This is the case of the outermost pixel layers of the future ATLAS tracking detector for the HL-LHC. For experiments at hadron colliders, radiation hardness is a key requirement which is not fulfilled by standard CMOS sensor designs that collect charge by diffusion. This issue has been addressed by depleted active pixel sensors in which electronics are embedded into a large deep implantation ensuring uniform charge collection by drift. Very first small prototypes of hybrid depleted active pixel sensors have already shown a radiation hardness compatible with the ATLAS requirements. Nevertheless, to compete with the present hybrid solutions a further reduction in costs achievable by a fully monolithic design is desirable. The H35DEMO is a large electrode full reticle demonstrator chip produced in AMS 350 nm HV-CMOS technology by the collaboration of Karlsruher Institut fur Technologie (KIT), Institut de Fisica dAltes Energies (IFAE), University of Liverpool and University of Geneva. It includes two large monolithic pixel matrices which can be operated standalone. One of these two matrices has been characterised at beam test before and after irradiation with protons and neutrons. Results demonstrated the feasibility of producing radiation hard large area fully monolithic pixel sensors in HV-CMOS technology. H35DEMO chips with a substrate resistivity of 200$Omega$ cm irradiated with neutrons showed a radiation hardness up to a fluence of $10^{15}$n$_{eq}$cm$^{-2}$ with a hit efficiency of about 99% and a noise occupancy lower than $10^{-6}$ hits in a LHC bunch crossing of 25ns at 150V.