Subscribe to the gold package and get unlimited access to Shamra Academy
Register a new userALICE Diffractive Detector Control System for RUN-II in the ALICE Experiment
106
0
0.0
(
0
)
Added by
Juan-Carlos Cabanillas-Noris
Publication date
2016
fields
Physics
and research's language is
English
Ask ChatGPT about the research
No Arabic abstract
This paper describes general characteristics of the deployment and commissioned of the Detector Control System (DCS) AD0 for the second phase of the Large Hadron Collider (LHC). The AD0 detector is installed in the ALICE experiment to provide a better selection of diffractive events.
rate research
Read More
The ALICE Central Trigger Processor (CTP) is going to be upgraded for LHC Run 3 with completely new hardware and a new Trigger and Timing Control (TTC-PON) system based on a Passive Optical Network (PON) system. The new trigger system has been designed as dead time free and able to transmit trigger data at 9.6 Gbps. A new universal trigger board has been designed, where by changing the FMC card, it can function as a CTP or as a LTU. It is based on the Xilinx Kintex Ultrascale FPGA and upgraded TTC-PON. The new trigger system and the prototype of the trigger board will be presented.
The LHC with its unprecedented energy offers unique opportunities for groundbreaking measurements in p+p, p+A and A+A collisions even beyond the baseline experimental designs. ALICE is setting up a program of detector upgrades, which could to a large extent be installed in the LHC shutdown planned for 2017/18, to address the new scientific challenges. We will discuss examples of the scientific frontiers and will present the corresponding upgrade projects under study for the ALICE experiment.
In this paper the PreAmplifier ShAper (PASA) for the Time Projection Chamber (TPC) of the ALICE experiment at LHC is presented. The ALICE TPC PASA is an ASIC that integrates 16 identical channels, each consisting of Charge Sensitive Amplifiers (CSA) followed by a Pole-Zero network, self-adaptive bias network, two second-order bridged-T filters, two non-inverting level shifters and a start-up circuit. The circuit is optimized for a detector capacitance of 18-25 pF. For an input capacitance of 25 pF, the PASA features a conversion gain of 12.74 mV/fC, a peaking time of 160 ns, a FWHM of 190 ns, a power consumption of 11.65 mW/ch and an equivalent noise charge of 244e + 17e/pF. The circuit recovers smoothly to the baseline in about 600 ns. An integral non-linearity of 0.19% with an output swing of about 2.1 V is also achieved. The total area of the chip is 18 mm$^2$ and is implemented in AMSs C35B3C1 0.35 micron CMOS technology. Detailed characterization test were performed on about 48000 PASA circuits before mounting them on the ALICE TPC front-end cards. After more than two years of operation of the ALICE TPC with p-p and Pb-Pb collisions, the PASA has demonstrated to fulfill all requirements.
ALICE is the experiment at the CERN LHC devoted to study heavy-ion collisions. An upgrade program of the ALICE detector is ongoing toward the LHC Run 3 starting in 2022 together with the upgrade of the data acquisition system and the detector control system (DCS). One of the main projects of the current ALICE upgrade program is the addition of the muon forward tracker (MFT), a new silicon pixel detector located at forward rapidity. In this paper, we describe the DCS of the MFT detector which is entirely controlled via a finite state machine in a hierarchical system.
The Silicon Pixel Detector (SPD) constitutes the two innermost layers of the Inner Tracking System of the ALICE experiment and it is the closest detector to the interaction point. As a vertex detector, it has the unique feature of generating a trigger signal that contributes to the L0 trigger of the ALICE experiment. The SPD started collecting data since the very first pp collisions at LHC in 2009 and since then it has taken part in all pp, Pb-Pb and p-Pb data taking campaigns. This contribution will present the main features of the SPD, the detector performance and the operational experience, including calibration and optimization activities from Run 1 to Run 2.
Log in to be able to interact and post comments
comments
Fetching comments
Sign in to be able to follow your search criteria
