Subscribe to the gold package and get unlimited access to Shamra Academy
Register a new userFirst prototype of a silicon tracker using an artificial retina for fast track finding
240
0
0.0
(
0
)
Ask ChatGPT about the research
No Arabic abstract
We report on the R&D for a first prototype of a silicon tracker based on an alternative approach for fast track finding. The working principle is inspired from neurobiology, in particular by the processing of visual images by the brain as it happens in nature. It is based on extensive parallelisation of data distribution and pattern recognition. In this work we present the design of a practical device that consists of a telescope based on single-sided silicon detectors; we describe the data acquisition system and the implementation of the track finding algorithms using available digital logic of commercial FPGA devices. Tracking performance and trigger capabilities of the device are discussed along with perspectives for future applications.
rate research
Read More
We present the results of a detailed simulation of the artificial retina pattern-recognition algorithm, designed to reconstruct events with hundreds of charged-particle tracks in pixel and silicon detectors at LHCb with LHC crossing frequency of $40,rm MHz$. Performances of the artificial retina algorithm are assessed using the official Monte Carlo samples of the LHCb experiment. We found performances for the retina pattern-recognition algorithm comparable with the full LHCb reconstruction algorithm.
We present the results of an R&D study for a specialized processor capable of precisely reconstructing events with hundreds of charged-particle tracks in pixel and silicon strip detectors at $40,rm MHz$, thus suitable for processing LHC events at the full crossing frequency. For this purpose we design and test a massively parallel pattern-recognition algorithm, inspired to the current understanding of the mechanisms adopted by the primary visual cortex of mammals in the early stages of visual-information processing. The detailed geometry and charged-particles activity of a large tracking detector are simulated and used to assess the performance of the artificial retina algorithm. We find that high-quality tracking in large detectors is possible with sub-microsecond latencies when the algorithm is implemented in modern, high-speed, high-bandwidth FPGA devices.
Real-time track tracking in high energy physics experiments at colliders running at high luminosity is very challenging for trigger systems. To perform pattern-recognition and track fitting in online trigger system, the artificial Retina algorithm has been introduced in the field. Retina can be implemented in the state of the art FPGA devices. Our developments use Retina in an iterative way to identify track for barrel-shape tracker embedded in a high magnetic field and with high track multiplicity. As a benchmark we simulate LHC t-tbar events, with a pile-up of 200 and a GEANT-4 based simulation of a 6-layers barrel tracker detector made of silicon modules. With this sample the performance of the hardware design (resource usage, latency) is evaluated. Both efficiency and purity of the Retina fitting are over 90%. Moreover we have also added a Kalman filter after the Retina fit to improve the resolution on the track parameters. Our simulation results show that the Kalman filter can work well together with the Retina algorithm to find track through t-tbar event and provides high resolutions of the reconstructed parameters.
When testing and calibrating particle detectors in a test beam, accurate tracking information independent of the detector being tested is extremely useful during the offline analysis of the data. A general-purpose Silicon Beam Tracker (SBT) was constructed with an active area of 32.0 x 32.0 mm2 to provide this capability for the beam calibration of the Cosmic Ray Energetics And Mass (CREAM) calorimeter. The tracker consists of two modules, each comprised of two orthogonal layers of 380 {mu}m thick silicon strip sensors. In one module each layer is a 64-channel AC-coupled single-sided silicon strip detector (SSD) with a 0.5 mm pitch. In the other, each layer is a 32-channel DC-coupled single-sided SSD with a 1.0 mm pitch. The signals from the 4 layers are read out using modified CREAM hodoscope front-end electronics with a USB 2.0 interface board to a Linux DAQ PC. In this paper, we present the construction of the SBT, along with its performance in radioactive source tests and in a CERN beam test in October 2006.
We present results of an R&D study for a specialized processor capable of precisely reconstructing, in pixel detectors, hundreds of charged-particle tracks from high-energy collisions at 40 MHz rate. We apply a highly parallel pattern-recognition algorithm, inspired by studies of the processing of visual images by the brain as it happens in nature, and describe in detail an efficient hardware implementation in high-speed, high-bandwidth FPGA devices. This is the first detailed demonstration of reconstruction of offline-quality tracks at 40 MHz and makes the device suitable for processing Large Hadron Collider events at the full crossing frequency.
Log in to be able to interact and post comments
comments
Fetching comments
Sign in to be able to follow your search criteria
