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Register a new userDesign of the Readout Electronics for the Qualification Model of DAMPE BGO Calorimeter
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The DAMPE (DArk Matter Particle Explorer) is a scientific satellite being developed in China, aimed at cosmic ray study, gamma ray astronomy, and searching for the clue of dark matter particles, with a planned mission period of more than 3 years and an orbit altitude of about 500 km. The BGO Calorimeter, which consists of 308 BGO (Bismuth Germanate Oxid) crystal bars, 616 PMTs (photomultiplier tubes) and 1848 dynode signals, has approximately 32 radiation lengths. It is a crucial sub-detector of the DAMPE payload, with the functions of precisely measuring the energy of cosmic particles from 5 GeV to 10TeV, distinguishing positrons/electrons and gamma rays from hadron background, and providing trigger information for the whole DAMPE payload. The dynamic range for a single BGO crystal is about 2?105 and there are 1848 detector signals in total. To build such an instrument in space, the major design challenges for the readout electronics come from the large dynamic range, the high integrity inside the very compact structure, the strict power supply budget and the long term reliability to survive the hush environment during launch and in orbit. Currently the DAMPE mission is in the end of QM (Qualification Model) stage. This paper presents a detailed description of the readout electronics for the BGO calorimeter.
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The BGO calorimeter, which provides a wide measurement range of the primary cosmic ray spectrum, is a key sub-detector of Dark Matter Particle Explorer (DAMPE). The readout electronics of calorimeter consists of 16 pieces of Actel ProASIC Plus FLASH-based FPGA, of which the design-level flip-flops and embedded block RAMs are single event upset (SEU) sensitive in the harsh space environment. Therefore to comply with radiation hardness assurance (RHA), SEU mitigation methods, including partial triple modular redundancy (TMR), CRC checksum, and multi-domain reset are analyzed and tested by the heavy-ion beam test. Composed of multi-level redundancy, a FPGA design with the characteristics of SEU tolerance and low resource consumption is implemented for the readout electronics.
An onboard calibration circuit has been designed for the front-end electronics (FEE) of DAMPE BGO Calorimeter. It is mainly composed of a 12 bit DAC, an operation amplifier and an analog switch. Test results showed that a dynamic range of 0 ~ 30 pC with a precision of 5 fC was achieved, which meets the requirements of the front-end electronics. Furthermore, it is used to test the trigger function of the FEEs. The calibration circuit has been implemented and verified by all the environmental tests for both Qualification Model and Flight Model of DAMPE. The DAMPE satellite will be launched at the end of 2015 and the calibration circuit will perform onboard calibration in space.
The New Iram Kid Arrays-2 (NIKA2) instrument has recently been installed at the IRAM 30 m telescope. NIKA2 is a state-of-art instrument dedicated to mm-wave astronomy using microwave kinetic inductance detectors (KID) as sensors. The three arrays installed in the camera, two at 1.25 mm and one at 2.05 mm, feature a total of 3300 KIDs. To instrument these large array of detectors, a specifically designed electronics, composed of 20 readout boards and hosted in three microTCA crates, has been developed. The implemented solution and the achieved performances are presented in this paper. We find that multiplexing factors of up to 400 detectors per board can be achieved with homogeneous performance across boards in real observing conditions, and a factor of more than 3 decrease in volume with respect to previous generations.
The Silicon Tracker (STK) is a detector of the DAMPE satellite to measure the incidence direction of high energy cosmic ray. It consists of 6 X-Y double layers of silicon micro-strip detectors with 73,728 readout channels. Its a great challenge to readout the channels and process the huge volume of data in the critical space environment. 1152 Application Specific Integrated Circuits (ASIC) and 384 ADCs are adopted to readout the detector channels. The 192 Tracker Front-end Hybrid (TFH) modules and 8 identical Tracker Readout Board (TRB) modules are designed to control and digitalize the front signals. In this paper, the design of the readout electronics for STK and its performance will be presented in detail.
We present details of the design for the CCD readout electronics for the Subaru Telescope Prime Focus Spectrograph (PFS). The spectrograph is comprised of four identical spectrograph modules, each collecting roughly 600 spectra. The spectrograph modules provide simultaneous wavelength coverage over the entire band from 380 nm to 1260 nm through the use of three separate optical channels: blue, red, and near infrared (NIR). A camera in each channel images the multi-object spectra onto a 4k x 4k, 15 um pixel, detector format. The two visible cameras use a pair of Hamamatsu 2k x 4k CCDs with readout provided by custom electronics, while the NIR camera uses a single Teledyne HgCdTe 4k x 4k detector and ASIC Sidecar to read the device. The CCD readout system is a custom design comprised of three electrical subsystems: the Back End Electronics (BEE), the Front End Electronics (FEE), and a Pre-amplifier. The BEE is an off-the-shelf PC104 computer, with an auxiliary Xilinx FPGA module. The computer serves as the main interface to the Subaru messaging hub and controls other peripheral devices associated with the camera, while the FPGA is used to generate the necessary clocks and transfer image data from the CCDs. The FEE board sets clock biases, substrate bias, and CDS offsets. It also monitors bias voltages, offset voltages, power rail voltage, substrate voltage and CCD temperature. The board translates LVDS clock signals to biased clocks and returns digitized analog data via LVDS. Monitoring and control messages are sent from the BEE to the FEE using a standard serial interface. The Pre-amplifier board resides behind the detectors and acts as an interface to the two Hamamatsu CCDs. The Pre-amplifier passes clocks and biases to the CCDs, and analog CCD data is buffered and amplified prior to being returned to the FEE.
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