Subscribe to the gold package and get unlimited access to Shamra Academy
Register a new userOnboard Calibration Circuit for the Front-end Electronics of DAMPE BGO Calorimeter
114
0
0.0
(
0
)
Ask ChatGPT about the research
No Arabic abstract
An onboard calibration circuit has been designed for the front-end electronics (FEE) of DAMPE BGO Calorimeter. It is mainly composed of a 12 bit DAC, an operation amplifier and an analog switch. Test results showed that a dynamic range of 0 ~ 30 pC with a precision of 5 fC was achieved, which meets the requirements of the front-end electronics. Furthermore, it is used to test the trigger function of the FEEs. The calibration circuit has been implemented and verified by all the environmental tests for both Qualification Model and Flight Model of DAMPE. The DAMPE satellite will be launched at the end of 2015 and the calibration circuit will perform onboard calibration in space.
rate research
Read More
Dark Matter Particle Explorer (DAMPE) is a Chinese scientific satellite designed for cosmic ray study with a primary scientific goal of indirect search of dark matter particles. As a crucial sub-detector, BGO calorimeter measures the energy spectrum of cosmic rays in the energy range from 5 GeV to 10 TeV. In order to implement high-density front-end electronics (FEE) with the ability to measure 1848 signals from 616 photomultiplier tubes on the strictly constrained satellite platform, two kinds of 32-channel front-end ASICs, VA160 and VATA160, are customized. However, a space mission period of more than 3 years makes single event effect (SEE) a probable threat to reliability. In order to evaluate the SEE sensitivity of the chips and verify the effectiveness of mitigation methods, a series of laser-induced and heavy ion-induced SEE tests were performed. Benefiting from the single event latch-up (SEL) protection circuit for power supply, the triple module redundancy (TMR) technology for the configuration registers and optimized sequential design for data acquisition process, VA160 and VATA160 with the quantity of 54 and 32 respectively have been applied in the flight model of BGO calorimeter with radiation hardness assurance.
The BGO calorimeter, which provides a wide measurement range of the primary cosmic ray spectrum, is a key sub-detector of Dark Matter Particle Explorer (DAMPE). The readout electronics of calorimeter consists of 16 pieces of Actel ProASIC Plus FLASH-based FPGA, of which the design-level flip-flops and embedded block RAMs are single event upset (SEU) sensitive in the harsh space environment. Therefore to comply with radiation hardness assurance (RHA), SEU mitigation methods, including partial triple modular redundancy (TMR), CRC checksum, and multi-domain reset are analyzed and tested by the heavy-ion beam test. Composed of multi-level redundancy, a FPGA design with the characteristics of SEU tolerance and low resource consumption is implemented for the readout electronics.
A BGO electromagnetic calorimeter (ECAL) is built for the DArk Matter Particle Explorer (DAMPE) mission. The effect of temperature on the BGO ECAL was investigated with a thermal vacuum experiment. The light output of a BGO crystal depends on temperature significantly. The temperature coefficient of each BGO crystal bar has been calibrated, and a correction method is also presented in this paper.
The high-luminosity phase of the Large Hadron Collider will provide 5-7 times greater luminosities than assumed in the original detector design. An improved trigger system requires an upgrade of the readout electronics of the ATLAS Liquid Argon Calorimeter. Concepts for the future readout of the 182,500 calorimeter cells at 40-80 MHz and 16-bit dynamic range and the developments of radiation-tolerant, low-noise, low-power, and high-bandwidth front-end electronic components, including preamplifiers and shapers, 14-bit ADCs, and 10-Gb/s laser diode array drivers, are presented in this paper.
This paper describes an R&D electronic program for the next generation of linear collider electromagnetic calorimeter. After a brief presentation of the requirements, a global scheme of the electronics is given. Then, we describe the three different building blocks developed in 0.35mum CMOS technology: an amplifier, a comparator and finally the pipelined ADC
Log in to be able to interact and post comments
comments
Fetching comments
Sign in to be able to follow your search criteria
