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Register a new userPerformance of Ultra-Fast Silicon Detectors
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Added by
Nicol\\`o Cartiglia
Publication date
2013
fields
Physics
and research's language is
English
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The development of Low-Gain Avalanche Detectors has opened up the possibility of manufacturing silicon detectors with signal larger than that of traditional sensors. In this paper we explore the timing performance of Low-Gain Avalanche Detectors, and in particular we demonstrate the possibility of obtaining ultra-fast silicon detector with time resolution of less than 20 picosecond.
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Ultra-Fast Silicon Detectors (UFSDs) are n-in-p silicon detectors that implement moderate gain (typically 5 to 25) using a thin highly doped p++ layer between the high resistivity p-bulk and the junction of the sensor. The presence of gain allows excellent time measurement for impinging minimum ionizing charged particles. An important design consideration is the sensor thickness, which has a strong impact on the achievable time resolution. We present the result of measurements for LGADs of thickness between 20 micro-m and 50 micro-m. The data are fit to a formula that captures the impact of both electronic jitter and Landau fluctuations on the time resolution. The data illustrate the importance of having a saturated electron drift velocity and a large signal-to-noise in order to achieve good time resolution. Sensors of 20 micro-m thickness offer the potential of 10 to 15 ps time resolution per measurement, a significant improvement over the value for the 50 micro-m sensors that have been typically used to date.
In this paper we report on the timing resolution of the first production of 50 micro-meter thick Ultra-Fast Silicon Detectors (UFSD) as obtained in a beam test with pions of 180 GeV/c momentum. UFSD are based on the Low-Gain Avalanche Detectors (LGAD) design, employing n-on-p silicon sensors with internal charge multiplication due to the presence of a thin, low-resistivity diffusion layer below the junction. The UFSD used in this test belongs to the first production of thin (50 {mu}m) sensors, with an pad area of 1.4 mm2. The gain was measured to vary between 5 and 70 depending on the bias voltage. The experimental setup included three UFSD and a fast trigger consisting of a quartz bar readout by a SiPM. The timing resolution, determined comparing the time of arrival of the particle in one or more UFSD and the trigger counter, for single UFSD was measured to be 35 ps for a bias voltage of 200 V, and 26 ps for a bias voltage of 240 V, and for the combination of 3 UFSD to be 20 ps for a bias voltage of 200 V, and 15 ps for a bias voltage of 240 V.
Fondazione Bruno Kessler (FBK, Trento, Italy) has recently delivered its first 50 $mu$m thick production of Ultra-Fast Silicon Detectors (UFSD), based on the Low-Gain Avalanche Diode design. These sensors use high resistivity Si-on-Si substrates, and have a variety of gain layer doping profiles and designs based on Boron, Gallium, Carbonated Boron and Carbonated Gallium to obtain a controlled multiplication mechanism. Such variety of gain layers will allow identifying the most radiation hard technology to be employed in the production of UFSD, to extend their radiation resistance beyond the current limit of $phi sim$ 10$^{15}$ n$_{eq}$/cm$^2$. In this paper, we present the characterisation, the timing performances, and the results on radiation damage tolerance of this new FBK production.
This article describes a new charged-particle track fitting algorithm designed for use in high-speed electronics applications such as hardware-based triggers in high-energy physics experiments. Following a novel technique designed for fast electronics, the positions of the hits on the detector are transformed before being passed to a linearized track parameter fit. This transformation results in fitted track parameters with a very linear dependence on the hit positions. The approach is demonstrated in a representative detector geometry based on the CMS detector at the Large Hadron Collider. The fit is implemented in FPGA chips and optimized for track fitting throughput and obtains excellent track parameter performance. Such an algorithm is potentially useful in any high-speed track-fitting application.
A silicon 3D detector with a single cell of 50x50 um2 was produced and evaluated for timing applications. The measurements of time resolution were performed for 90Sr electrons with dedicated electronics used also for determining time resolution of Low Gain Avalanche Detectors (LGADs). The measurements were compared to those with LGADs and also simulations. The studies showed that the dominant contribution to the timing resolution comes from the time walk originating from different induced current shapes for hits over the cell area. This contribution decreases with higher bias voltages, lower temperatures and smaller cell sizes. It is around 30 ps for a 3D detector of 50x50 um2 cell at 150 V and -20C, which is comparable to the time walk due to Landau fluctuations in LGADs. It even improves for inclined tracks and larger pads composed of multiple cells. A good agreement between measurements and simulations was obtained, thus validating the simulation results.
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