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Register a new userPackage Hermeticity Testing with Thermal Transient Measurements
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Added by
EDA Publishing Association
Publication date
2008
fields
Informatics Engineering
and research's language is
English
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The rapid incursion of new technologies such as MEMS and smart sensor device manufacturing requires new tailor-made packaging designs. In many applications these devices are exposed to humid environments. Since the penetration of moisture into the package may result in internal corrosion or shift of the operating parameters, the reliability testing of hermetically sealed packages has become a crucial question in the semiconductor industry.
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Speed and cost of logistics are two major concerns to on-line shoppers, but they generally conflict with each other in nature. To alleviate the contradiction, we propose to exploit existing taxis that are transporting passengers on the street to relay packages collaboratively, which can simultaneously lower the cost and accelerate the speed. Specifically, we propose a probabilistic framework containing two phases called CrowdExpress for the on-time package express deliveries. In the first phase, we mine the historical taxi GPS trajectory data offline to build the package transport network. In the second phase, we develop an online adaptive taxi scheduling algorithm to find the path with the maximum arriving-on-time probability on-the-fly upon real- time requests, and direct the package routing accordingly. Finally, we evaluate the system using the real-world taxi data generated by over 19,000 taxis in a month in the city of New York, US. Results show that around 9,500 packages can be delivered successfully on time per day with the success rate over 94%, moreover, the average computation time is within 25 milliseconds.
This paper reports on the systematic electromechanical characterization of a new three-axial force sensor used in dimensional metrology of micro components. The siliconbased sensor system consists of piezoresistive mechanicalstress transducers integrated in thin membrane hinges supporting a suspended flexible cross structure. The mechanical behavior of the fragile micromechanical structure isanalyzed for both static and dynamic load cases. This work demonstrates that the silicon microstructure withstands static forces of 1.16N applied orthogonally to the front-side of the structure. A statistical Weibull analysis of the measured data shows that these values are significantly reduced if the normal force is applied to the back of the sensor. Improvements of the sensor system design for future development cycles are derived from the measurement results.
We introduce hyppo, a unified library for performing multivariate hypothesis testing, including independence, two-sample, and k-sample testing. While many multivariate independence tests have R packages available, the interfaces are inconsistent and most are not available in Python. hyppo includes many state of the art multivariate testing procedures. The package is easy-to-use and is flexible enough to enable future extensions. The documentation and all releases are available at https://hyppo.neurodata.io.
In the design flow of integrated circuits, chip-level verification is an important step that sanity checks the performance is as expected. Power grid verification is one of the most expensive and time-consuming steps of chip-level verification, due to its extremely large size. Efficient power grid analysis technology is highly demanded as it saves computing resources and enables faster iteration. In this paper, a topology-base power grid transient analysis algorithm is proposed. Nodal analysis is adopted to analyze the topology which is mathematically equivalent to iteratively solving a positive semi-definite linear equation. The convergence of the method is proved.
Overheating has been acknowledged as a major issue in testing complex SOCs. Several power constrained system-level DFT solutions (power constrained test scheduling) have recently been proposed to tackle this problem. However, as it will be shown in this paper, imposing a chip-level maximum power constraint doesnt necessarily avoid local overheating due to the non-uniform distribution of power across the chip. This paper proposes a new approach for dealing with overheating during test, by embedding thermal awareness into test scheduling. The proposed approach facilitates rapid generation of thermal-safer test schedules without requiring time-consuming thermal simulations. This is achieved by employing a low-complexity test session thermal model used to guide the test schedule generation algorithm. This approach reduces the chances of a design re-spin due to potential overheating during test.
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