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The construction of the ATLAS electromagnetic liquid argon calorimeter modules is completed and all the modules are assembled and inserted in the cryostats. During the production period four barrel and three endcap modules were exposed to test beams in order to assess their performance, ascertain the production quality and reproducibility, and to scrutinize the complete energy reconstruction chain from the readout and calibration electronics to the signal and energy reconstruction. It was also possible to check the full Monte Carlo simulation of the calorimeter. The analysis of the uniformity, resolution and extraction of constant term is presented. Typical non-uniformities of 0.5% and typical global constant terms of 0.6% are measured for the barrel and end-cap modules.
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The high-luminosity phase of the Large Hadron Collider will provide 5-7 times greater luminosities than assumed in the original detector design. An improved trigger system requires an upgrade of the readout electronics of the ATLAS Liquid Argon Calorimeter. Concepts for the future readout of the 182,500 calorimeter cells at 40-80 MHz and 16-bit dynamic range and the developments of radiation-tolerant, low-noise, low-power, and high-bandwidth front-end electronic components, including preamplifiers and shapers, 14-bit ADCs, and 10-Gb/s laser diode array drivers, are presented in this paper.
A Liquid-argon Trigger Digitizer Board (LTDB) is being developed to upgrade the ATLAS Liquid Argon Calorimeter Phase-I trigger electronics. The LTDB located at the front end needs to obtain the clock signals and be configured and monitored remotely from the back end. A clock and control system is being developed for the LTDB and the major functions of the system have been evaluated. The design and evaluation of the clock and control system are presented in this paper.
ATLAS has chosen for its Hadronic End-Cap Calorimeter (HEC) the copper-liquid argon sampling technique with flat plate geometry and GaAs pre-amplifiers in the argon. The contruction of the calorimeter is now approaching completion. Results of production quality checks are reported and their anticipated impact on calorimeter performance discussed. Selected results, such as linearity, electron and pion energy resolution, uniformity of energy response, obtained in beam tests both of the Hadronic End-Cap Calorimeter by itself, and in the ATLAS configuration where the HEC is in combination with the Electromagnetic End-Cap Calorimeter (EMEC) are described.
A serializer ASIC and a VCSEL driver ASIC are needed for the front-end optical data transmission in the ATLAS liquid argon calorimeter readout phase-I upgrade. The baseline ASICs are the serializer LOCx2 and the VCSEL driver LOCld, designed in a 0.25-{mu}m Silicon-on-Sapphire (SoS) CMOS technology and consumed 843 mW and 320 mW, respectively. Based on a 130-nm CMOS technology, we design two pin-to-pin-compatible backup ASICs, LOCx2-130 and LOCld-130. Their power consumptions are much lower then of their counterparts, whereas other performance, such as the latency, data rate, and radiation tolerance, meet the phase-I upgrade requirements. We present the design of LOCx2-130 and LOCld-130. The test results of LOCx2-130 are also presented.
Two optical data link data transmission Application Specific Integrated Circuits (ASICs), the baseline and its backup, have been designed for the ATLAS Liquid Argon (LAr) Calorimeter Phase-I trigger upgrade. The latency of each ASIC and that of its corresponding receiver implemented in a back-end Field-Programmable Gate Array (FPGA) are critical specifications. In this paper, we present the latency measurements and simulation of two ASICs. The measurement results indicate that both ASICs achieve their design goals and meet the latency specifications. The consistency between the simulation and measurements validates the ASIC latency characterization.
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