The next generation of Adaptive Optics (AO) systems on large telescopes will require immense computation performance and memory bandwidth, both of which are challenging with the technology available today. The objective of this work is to create a future-proof adaptive optics platform on an FPGA architecture, which scales with the number of subapertures, pixels per subaperture and external memory. We have created a scalable adaptive optics platform with an off-the-shelf FPGA development board, which provides an AO reconstruction time only limited by the external memory bandwidth. SPARC uses the same logic resources irrespective of the number of subapertures in the AO system. This paper is aimed at embedded developers who are interested in the FPGA design and the accompanying hardware interfaces. The central theme of this paper is to show how scalability is incorporated at different levels of the FPGA implementation. This work is a continuation of Part 1 of the paper which explains the concept, objectives, control scheme and method of validation used for testing the platform.
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