Investigating lateral electrical transport in p-type thin film chalcogenides is important to evaluate their potential for field-effect transistors (FETs) and phase-change memory applications. For instance, p-type FETs with sputtered materials at low temperature (<= 250 C) could play a role in flexible electronics or back-end-of-line (BEOL) silicon-compatible processes. Here, we explore lateral transport in chalcogenide films (Sb2Te3, Ge2Sb2Te5, Ge4Sb6Te7) and multilayers, with Hall measurements (in <= 50 nm thin films) and with p-type transistors (in <= 5 nm ultrathin films). The highest Hall mobilities are measured for Sb2Te3/GeTe superlattices (~18 cm2/V/s at room temperature), over 2-3x higher than the other films. In ultrathin p-type FETs with Ge2Sb2Te5, we achieve field-effect mobility up to ~5.5 cm2/V/s with current on/off ratio ~10000, the highest for Ge2Sb2Te5 transistors to date. We also explore process optimizations (e.g., AlOx capping layer, type of developer for lithography) and uncover their trade-offs towards the realization of p-type transistors with acceptable mobility and on/off current ratio. Our study provides essential insights into the optimization of electronic devices based on p-type chalcogenides.
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