We report low temperature scanning tunneling microscopy characterization of MoSe2 crystals, and the fabrication and electrical characterization of MoSe2 field-effect transistors on both SiO2 and parylene-C substrates. We find that the multilayer MoSe2 devices on parylene-C show a room temperature mobility close to the mobility of bulk MoSe2 (100 cm2V-1s-1 - 160 cm2V-1s-1), which is significantly higher than that on SiO2 substrate (~50 cm2V-1s-1). The room temperature mobility on both types of substrates are nearly thickness independent. Our variable temperature transport measurements reveal a metal-insulator transition at a characteristic conductivity of e2/h. The mobility of MoSe2 devices extracted from the metallic region on both SiO2 and parylene-C increases up to ~ 500 cm2V-1s-1 as the temperature decreases to ~ 100 K, with the mobility of MoSe2 on SiO2 increasing more rapidly. In spite of the notable variation of charged impurities as indicated by the strongly sample dependent low temperature mobility, the mobility of all MoSe2 devices on SiO2 converges above 200 K, indicating that the high temperature (> 200 K) mobility in these devices is nearly independent of the charged impurities. Our atomic force microscopy study of SiO2 and parylene-C substrates further rule out the surface roughness scattering as a major cause of the substrate dependent mobility. We attribute the observed substrate dependence of MoSe2 mobility primarily to the surface polar optical phonon scattering originating from the SiO2 substrate, which is nearly absent in MoSe2 devices on parylene-C substrate.
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