Quantum bits have technological imperfections. Additionally, the capacity of a component that can be implemented feasibly is limited. Therefore, distributed quantum computation is required to scale up quantum computers. This dissertation presents a new quantum computer architecture which takes into account imperfections, aimed to realize distributed computation by connecting quantum computers each of which consists of multiple quantum CPUs and memories. Quantum CPUs employ a quantum error correcting code which has faster logical gates and quantum memories employ a code which is superior in space resource requirements. This dissertation focuses on quantum error correcting codes, giving a practical, concrete method for tolerating static losses such as faulty devices for the surface code. Numerical simulation with practical assumptions showed that a yield of functional qubits of 90% is marginally capable of building large-scale systems, by culling the poorer 50% of lattices during post-fabrication testing. Yield 80% is not usable even when culling 90% of generated lattices. For internal connections in a quantum computer and for connections between quantum computers, this dissertation gives a fault-tolerant method that bridges heterogeneous quantum error correcting codes. Numerical simulation showed that the scheme, which discards any quantum state in which any error is detected, always achieves an adequate logical error rate regardless of physical error rates in exchange for increased resource consumption. This dissertation gives a new extension of the surface code suitable for memories. This code is shown to require fewer physical qubits to encode a logical qubit than conventional codes. This code achieves the reduction of 50% physical qubits per a logical qubit. Collectively, the elements to propose the distributed quantum computer architecture are brought together.
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