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Register a new userInAs nanowire transistors with multiple, independent wrap-gate segments
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We report a method for making horizontal wrap-gate nanowire transistors with up to four independently controllable wrap-gated segments. While the step up to two independent wrap-gates requires a major change in fabrication methodology, a key advantage to this new approach, and the horizontal orientation more generally, is that achieving more than two wrap-gate segments then requires no extra fabrication steps. This is in contrast to the vertical orientation, where a significant subset of the fabrication steps needs to be repeated for each additional gate. We show that cross-talk between adjacent wrap-gate segments is negligible despite separations less than 200 nm. We also demonstrate the ability to make multiple wrap-gate transistors on a single nanowire using the exact same process. The excellent scalability potential of horizontal wrap-gate nanowire transistors makes them highly favourable for the development of advanced nanowire devices and possible integration with vertical wrap-gate nanowire transistors in 3D nanowire network architectures.
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We present a simple fabrication technique for lateral nanowire wrap-gate devices with high capacitive coupling and field-effect mobility. Our process uses e-beam lithography with a single resist-spinning step, and does not require chemical etching. We measure, in the temperature range 1.5-250 K, a subthreshold slope of 5-54 mV/decade and mobility of 2800-2500 $cm^2/Vs$ -- significantly larger than previously reported lateral wrap-gate devices. At depletion, the barrier height due to the gated region is proportional to applied wrap-gate voltage.
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We compare the electronic characteristics of nanowire field-effect transistors made using single pure wurtzite and pure zincblende InAs nanowires with nominally identical diameter. We compare the transfer characteristics and field-effect mobility versus temperature for these devices to better understand how differences in InAs phase govern the electronic properties of nanowire transistors.
We report fabrication and measurement of a device where closely-placed two parallel InAs nanowires (NWs) are contacted by source and drain normal metal electrodes. Established technique includes selective deposition of double nanowires onto a previously defined gate region. By tuning the junction with the finger bottom gates, we confirmed the formation of parallel double quantum dots, one in each NW, with a finite electrostatic coupling between each other. With the fabrication technique established in this study, devices proposed for more advanced experiments, such as Cooper-pair splitting and the observation of parafermions, can be realized.
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