Subscribe to the gold package and get unlimited access to Shamra Academy
Register a new userPerformance of the Fully Digital FPGA-based Front-End Electronics for the GALILEO Array
126
0
0.0
(
0
)
Ask ChatGPT about the research
No Arabic abstract
In this work we present the architecture and results of a fully digital Front End Electronics (FEE) read out system developed for the GALILEO array. The FEE system, developed in collaboration with the Advanced Gamma Tracking Array (AGATA) collaboration, is composed of three main blocks: preamplifiers, digitizers and preprocessing electronics. The slow control system contains a custom Linux driver, a dynamic library and a server implementing network services. The digital processing of the data from the GALILEO germanium detectors has demonstrated the capability to achieve an energy resolution of 1.53 per mil at an energy of 1.33 MeV.
rate research
Read More
The branching ratio for the decay $K^+ to pi^+ ubar{ u}$ is sensitive to new physics; the NA62 experiment will measure it to within about 10%. To reject the dominant background from channels with final state photons, the large-angle vetoes (LAVs) must detect particles with better than 1 ns time resolution and 10% energy resolution over a very large energy range. Our custom readout board uses a time-over-threshold discriminator coupled to a TDC as a straightforward solution to satisfy these requirements. A prototype of the readout system was extensively tested together with the ANTI-A2 large angle veto module at CERN in summer 2010.
We report on the design and testing of novel mixed analog and digital front end ASICs custom made for the single photon detectors considered for the BTeV RICH system. The key features are reviewed, as well as results achieved using electronics bench tests and beam studies.
The GABRIELA [1] set-up is used at the FLNR to perform detailed nuclear structure studies of transfermium nuclei. Following the modernization of the VASSILISSA separator (SHELS) [2] the GABRIELA detection system has also been upgraded. The characteristics of the upgraded detection system will be presented along with results from some recent electronics tests.
The european Fazia collaboration aims at building a new modular array for charged product identification to be employed for heavy-ion studies. The elementary module of the array is a Silicon-Silicon-CsI telescope, optimized for ion identification also via pulse shape analysis. The achievement of top performances imposes specific electronics which has been developed by FAZIA and features high quality charge and current preamplifiers, coupled to fully digital front-end. During the initial R&D phase, original and novel solutions have been tested in prototypes, obtaining unprecedented ion identification capabilities. FAZIA is now constructing a demonstrator array consisting of about two hundreds telescopes arranged in a compact and transportable configuration. In this contribution, we mainly summarize some aspects studied by FAZIA to improve the ion identification. Then we will briefly discuss the FAZIA program centered on experiments to be done with the demonstrator. First results on the isospin dynamics obtained with a reduced set-up demonstrate well the performance of the telescope and represent a good starting point towards future investigations with both stable and exotic beams.
The GOSIP (Gigabit Optical Serial Interface Protocol) provides communication via optical fibres between multiple kinds of front-end electronics and the KINPEX PCIe receiver board located in the readout host PC. In recent years a stack of device driver software has been developed to utilize this hardware for several scenarios of data acquisition. On top of this driver foundation, several graphical user interfaces (GUIs) have been created. These GUIs are based on the Qt graphics libraries and are designed in a modular way: All common functionalities, like generic I/O with the front-ends, handling of configuration files, and window settings, are treated by a framework class GosipGUI. In the Qt workspace of such GosipGUI frame, specific sub classes may implement additional windows dedicated to operate different GOSIP front-end modules. These readout modules developed by GSI Experiment Electronics department are for instance FEBEX sampling ADCs, TAMEX FPGA-TDCs, or POLAND QFWs. For each kind of front-end the GUIs allow to monitor specific register contents, to set up the working configuration, and to interactively change parameters like sampling thresholds during data acquisition. The latter is extremely useful when qualifying and tuning the front-ends in the electronics lab or detector cave. Moreover, some of these GosipGUI implementations have been equipped with features for mostly automatic testing of ASICs in a prototype mass production. This has been applied for the APFEL-ASIC component of the PANDA experiment currently under construction, and for the FAIR beam diagnostic readout system POLAND.
Log in to be able to interact and post comments
comments
Fetching comments
Sign in to be able to follow your search criteria
