This paper presents parallel computers architectures especially Superscalar processors and Vector processors, building a simulator depending on the basic characteristics for each architecture, the simulator simulates their mechanism of work programmatically at the aim of comparing the performance of the two architectures in executing Data Level Parallelism (DLP) and Instruction Level Parallelism ILP. The results shows that the effectiveness of executing instructions in parallel depends significantly on choosing the appropriate architecture for execution, according to the type of parallelism that can be applied to instructions, and the vector features in the vector architecture achieve remarkable improvement in performance that cannot be ignored in execution of DLP, simplify the code and reduce the number of instruction. The provided simulator is a good core that can be developed and modified especially in the field of education for the students of Computer Science and Engineering and the research field.