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Register a new userA CMOS compatible platform for high impedance superconducting quantum circuits
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Aluminium based platforms have allowed to reach major milestones for superconducting quantum circuits. For the next generation of devices, materials that are able to maintain low microwave losses while providing new functionalities, such as large kinetic inductance or compatibility with CMOS platform are sought for. Here we report on a combined direct current (DC) and microwave investigation of titanium nitride lms of dierent thicknesses grown using CMOS compatible methods. For microwave resonators made of TiN lm of thickness $sim$3 nm, we measured large kinetic inductance LK $sim$ 240 pH/sq, high mode impedance of $sim$ 4.2 k$Omega$ while maintaining microwave quality factor $sim$ 10^5 in the single photon limit. We present an in-depth study of the microwave loss mechanisms in these devices that indicates the importance of quasiparticles and provide insights for further improvement.
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Recent advances in photonic integrated circuits (PICs) have enabled a new generation of programmable many-mode interferometers (PMMIs) realized by cascaded Mach Zehnder Interferometers (MZIs) capable of universal linear-optical transformations on N input-output optical modes. PMMIs serve critical functions in photonic quantum information processing, quantum-enhanced sensor networks, machine learning and other applications. However, PMMI implementations reported to date rely on thermo-optic phase shifters, which limit applications due to slow response times and high power consumption. Here, we introduce a large-scale PMMI platform, based on a 200 mm CMOS process, that uses aluminum nitride (AlN) piezo-optomechanical actuators coupled to silicon nitride (SiN) waveguides, enabling low-loss propagation with phase modulation at greater than 100 MHz in the visible to near-infrared wavelengths. Moreover, the vanishingly low holding-power consumption of the piezo-actuators enables these PICs to operate at cryogenic temperatures, paving the way for a fully integrated device architecture for a range of quantum applications.
Higher-order soliton dynamics, specifically soliton compression and fission, underpin crucial applications in ultrafast optics, sensing, communications, and signal processing. Bragg solitons exploit the strong dispersive properties of periodic media near the photonic band edge, enabling soliton dynamics to occur on chip-scale propagation distances and opening avenues to harness soliton compression and fission in integrated photonic platforms. However, implementation in CMOS-compatible platforms has been hindered by the strong nonlinear loss that dominates the propagation of high-intensity pulses in silicon and the low-optical nonlinearity of traditional silicon nitride. Here, we present CMOS-compatible, on-chip Bragg solitons, with the largest soliton-effect pulse compression to date with a factor of x5.7, along with the first time-resolved measurements of soliton fission on a CMOS-compatible platform. These observations were enabled by the combination of unique cladding-modulated Bragg grating design, the high nonlinearity and negligible nonlinear loss of compositionally engineered ultra-silicon-rich nitride (USRN: Si7N3).
We report on the fabrication and metrology of superconducting caps for qubit circuits. As part of a 3D quantum integrated circuit architecture, a cap chip forms the upper half of an enclosure that provides isolation, increases vacuum participation ratio, and improves performance of individual resonant elements. Here, we demonstrate that such caps can be reliably fabricated, placed on a circuit chip, and form superconducting connections to the circuit.
We report the first quantum bit device implemented on a foundry-compatible Si CMOS platform. The device, fabricated using SOI NanoWire MOSFET technology, is in essence a compact two-gate pFET. The qubit is encoded in the spin degree of freedom of a hole Quantum Dot defined by one of the Gates. Coherent spin manipulation is performed by means of an RF E-Field signal applied to the Gate itself.
We describe a microfabrication process for superconducting through-silicon vias appropriate for use in superconducting qubit quantum processors. With a sloped-wall via geometry, we can use non-conformal metal deposition methods such as electron-beam evaporation and sputtering, which reliably deposit high quality superconducting films. Via superconductivity is validated by demonstrating zero via-to-via resistance below the critical temperature of aluminum.
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