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Register a new userEfficient quantum programming using EASE gates on a trapped-ion quantum computer
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Parallel operations in conventional computing have proven to be an essential tool for efficient and practical computation, and the story is not different for quantum computing. Indeed, there exists a large body of works that study advantages of parallel implementations of quantum gates for efficient quantum circuit implementations. Here, we focus on the recently invented efficient, arbitrary, simultaneously entangling (EASE) gates, available on a trapped-ion quantum computer. Leveraging its flexibility in selecting arbitrary pairs of qubits to be coupled with any degrees of entanglement, all in parallel, we show a $n$-qubit Clifford circuit can be implemented using $6log(n)$ EASE gates, a $n$-qubit multiply-controlled NOT gate can be implemented using $3n/2$ EASE gates, and a $n$-qubit permutation can be implemented using six EASE gates. We discuss their implications to near-term quantum chemistry simulations and the state of the art pattern matching algorithm. Given Clifford + multiply-controlled NOT gates form a universal gate set for quantum computing, our results imply efficient quantum computation by EASE gates, in general.
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Efficiently entangling pairs of qubits is essential to fully harness the power of quantum computing. Here, we devise an exact protocol that simultaneously entangles arbitrary pairs of qubits on a trapped-ion quantum computer. The protocol requires classical computational resources polynomial in the system size, and very little overhead in the quantum control compared to a single-pair case. We demonstrate an exponential improvement in both classical and quantum resources over the current state of the art. We implement the protocol on a software-defined trapped-ion quantum computer, where we reconfigure the quantum computer architecture on demand. Together with the all-to-all connectivity available in trapped-ion quantum computers, our results establish that trapped ions are a prime candidate for a scalable quantum computing platform with minimal quantum latency.
Quantum computing is currently limited by the cost of two-qubit entangling operations. In order to scale up quantum processors and achieve a quantum advantage, it is crucial to economize on the power requirement of two-qubit gates, make them robust to drift in experimental parameters, and shorten the gate times. In this paper, we present two methods, one exact and one approximate, to construct optimal pulses for entangling gates on a pair of ions within a trapped ion chain, one of the leading quantum computing architectures. Our methods are direct, non-iterative, and linear, and can construct gate-steering pulses requiring less power than the standard method by more than an order of magnitude in some parameter regimes. The power savings may generally be traded for reduced gate time and greater qubit connectivity. Additionally, our methods provide increased robustness to mode drift. We illustrate these trade-offs on a trapped-ion quantum computer.
A global race towards developing a gate-based, universal quantum computer that one day promises to unlock the never before seen computational power has begun and the biggest challenge in achieving this goal arguably is the quality implementation of a two-qubit gate. In a trapped-ion quantum computer, one of the leading quantum computational platforms, a two-qubit gate is typically implemented by modulating the individual addressing beams that illuminate the two target ions, which, together with others, form a linear chain. The required modulation, expectedly so, becomes increasingly more complex, especially as the quantum computer becomes larger and runs faster, complicating the control hardware design. Here, we develop a simple method to essentially remove the pulse-modulation complexity at the cost of engineering the normal modes of the ion chain. We demonstrate that the required mode engineering is possible for a three ion chain, even with a trapped-ion quantum computational system built and optimized for a completely different mode of operations. This indicates that a system, if manufactured to target specifically for the mode-engineering based two-qubit gates, would readily be able to implement the gates without significant additional effort.
For the anticipated application of quantum computing in electronic structure simulation, we propose a systematically improvable end-to-end pipeline to overcome the resource and noise limitations prevalent on developing quantum hardware. Using density matrix embedding theory as a problem decomposition technique, and an ion-trap quantum computer, we simulate a ring of 10 hydrogen atoms without freezing any electrons. On the most aggressive decomposition setting, the original 20-qubit system is divided into 10 two-qubit subproblems. Combining this decomposition with circuit optimization and density matrix purification, we are able to accurately reproduce the potential energy curve in agreement with the full configuration interaction energy in the minimal basis set. Although problem decomposition techniques are generally approximate methods, the induced error can often be systematically suppressed by increasing the size of the subproblems. This allows our pipeline to become applicable to more-complex systems as quantum computers grow in computational capacity. Our experimental results are an early step in demonstrating how the appropriate choice of decomposition could be a critical component for enabling the quantum simulation of larger, more industrially relevant molecules using fewer computational resources.
The cost of enabling connectivity in Noisy-Intermediate-Scale-Quantum devices is an important factor in determining computational power. We have created a qubit routing algorithm which enables efficient global connectivity in a previously proposed trapped ion quantum computing architecture. The routing algorithm was characterized by comparison against both a strict lower bound, and a positional swap based routing algorithm. We propose an error model which can be used to estimate the achievable circuit depth and quantum volume of the device as a function of experimental parameters. We use a new metric based on quantum volume, but with native two qubit gates, to assess the cost of connectivity relative to the upper bound of free, all to all connectivity. The metric was also used to assess a square grid superconducting device. We compare these two architectures and find that for the shuttling parameters used, the trapped ion design has a substantially lower cost associated with connectivity.
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