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Register a new userThe Automatic Calibration Unit in JUNO
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This paper describes the design and construction of the automatic calibration unit (ACU) for the JUNO experiment. The ACU is a fully automated mechanical system. It is capable of deploying multiple radioactive sources, an ultraviolet (UV) laser source, or an auxiliary sensor such as a temperature sensor, one at a time, into the central detector of JUNO along the central axis. It is designed as a primary tool to precisely calibrate the energy scale of detector, aligning timing for the photosensors, and partially monitoring the position-dependent energy scale variations.
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We present the calibration strategy for the 20 kton liquid scintillator central detector of the Jiangmen Underground Neutrino Observatory (JUNO). By utilizing a comprehensive multiple-source and multiple-positional calibration program, in combination with a novel dual calorimetry technique exploiting two independent photosensors and readout systems, we demonstrate that the JUNO central detector can achieve a better than 1% energy linearity and a 3% effective energy resolution, required by the neutrino mass ordering determination.
The Jiangmen Underground Neutrino Observatory (JUNO) is a medium-baseline neutrino experiment under construction in China, with the goal to determine the neutrino mass hierarchy. The JUNO electronics readout system consists of an underwater front-end electronics system and an outside-water back-end electronics system. These two parts are connected by 100-meter Ethernet cables and power cables. The back-end card (BEC) is the part of the JUNO electronics readout system used to link the underwater boxes to the trigger system is connected to transmit the system clock and triggered signals. Each BEC is connected to 48 underwater boxes, and in total around 150 BECs are needed. It is essential to verify the physical layer links before applying real connection with the underwater system. Therefore, our goal is to build an automatic test system to check the physical link performance. The test system is based on a custom designed FPGA board, in order to make the design general, only JTAG is used as the interface to the PC. The system can generate and check different data pattern at different speeds for 96 channels simultaneously. The test results of 1024 continuously clock cycles are automatically uploaded to PC periodically. We describe the setup of the automatic test system of the BEC and present the latest test results.
Jiangmen Underground Neutrino Observatory (JUNO) is designed to determine the neutrino mass hierarchy using a 20 kton liquid scintillator detector. To calibrate detector boundary effect, the Guide Tube Calibration System (GTCS) has been designed to deploy a radioactive source along a given longitude on the outer surface of the detector. In this paper, we studied the physics case of this system via simulation, which leads to a mechanical design.
A Guide Tube Calibration System (GTCS) has been designed for the Jiangmen Underground Neutrino Observatory (JUNO), in order to measure the detector energy response near the outer radius of the active volume. Recently, a prototype system has been constructed and tested, and the calibration algorithm has also been studied to evaluate the risk when the simulation tuning and the error control fail. In this paper, we first report its construction and the performance tests in the lab. Then the influence on the global energy measurement caused by the simulation bias of GTCS is discussed, in order to make sure the algorithm is qualified.
We present the implementation and verification of an in-pixel automatic threshold calibration circuit for the CMS Endcap Timing Layer (ETL) in the High-Luminosity LHC upgrade. The discriminator threshold of the ETL readout chip (ETROC) needs to be calibrated regularly to mitigate the circuit baseline change. Traditional methods need a lot of communication through a slow control system hence are time-consuming. This paper describes an in-pixel automatic scheme with improvements in operating time and usability. In this scheme, a sample-accumulation circuit is used to measure the average discriminator output. A binary successive approximation and linear combination scan are applied to find the equivalent baseline. The actual calibration procedure has been first implemented in FPGA firmware and tested with the ETROC front-end prototype chip (ETROC0). The calibration circuit has been implemented with Triple Modular Redundancy (TMR) and verified with Single Event Effects (SEEs) simulation. A complete calibration process lasts 35 ms with a 40 MHz clock. In the worst case, the dynamic and static power consumption are estimated to be 300 uW and 10.4 uW, respectively. The circuit design, implemented in a 65 CMOS technology, will be integrated into ETROC2, the next iteration of the ETROC with a 16x16 pixel matrix.
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