Thermal resistances from interfaces impede heat dissipation in micro/nanoscale electronics, especially for high-power electronics. Despite the growing importance of understanding interfacial thermal transport, advanced thermal characterization techniques which can visualize thermal conductance across buried interfaces, especially for nonmetal-nonmetal interfaces, are still under development. This work reports a dual-modulation-frequency TDTR mapping technique to visualize the thermal conduction across buried semiconductor interfaces for beta-Ga2O3-SiC samples. Both the beta-Ga2O3 thermal conductivity and the buried beta-Ga2O3-SiC thermal boundary conductance (TBC) are visualized for an area of 200 um x 200 um. Areas with low TBC values ( smaller than 20 MW/m2-K) are successfully identified on the TBC map, which correspond to weakly bonded interfaces caused by high-temperature annealing. The steady-state temperature rise (detector voltage), usually ignored in TDTR measurements, is found to be able to probe TBC variations of the buried interfaces without the limit of thermal penetration depth. This technique can be applied to detect defects/voids in deeply buried heterogeneous interfaces non-destructively, and also opens a door for the visualization of thermal conductance in nanoscale nonhomogeneous structures.
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