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Register a new userA flexible 300 mm integrated Si MOS platform for electron- and hole-spin qubits exploration
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We report on a flexible 300 mm process that optimally combines optical and electron beam lithography to fabricate silicon spin qubits. It enables on-the-fly layout design modifications while allowing devices with either n- or p-type ohmic implants, a pitch smaller than 100 nm, and uniform critical dimensions down to 30 nm with a standard deviation ~ 1.6 nm. Various n- and p-type qubits are characterized in a dilution refrigerator at temperatures ~ 10 mK. Electrical measurements demonstrate well-defined quantum dots, tunable tunnel couplings, and coherent spin control, which are essential requirements for the implementation of a large-scale quantum processor.
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Spin-based silicon quantum dots are an attractive qubit technology for quantum information processing with respect to coherence time, control, and engineering. Here we present an exchange-only Si qubit device platform that combines the throughput of CMOS-like wafer processing with the versatility of direct-write lithography. The technology, which we coin SLEDGE, features dot-shaped gates that are patterned simultaneously on one topographical plane and subsequently connected by vias to interconnect metal lines. The process design enables non-trivial layouts as well as flexibility in gate dimensions, material selection, and additional device features such as for rf qubit control. We show that the SLEDGE process has reduced electrostatic disorder with respect to traditional overlapping gate devices with lift-off metallization, and we present spin coherent exchange oscillations and single qubit blind randomized benchmarking data.
Larger arrays of electron spin qubits require radical improvements in fabrication and device uniformity. Here we demonstrate excellent qubit device uniformity and tunability from 300K down to mK temperatures. This is achieved, for the first time, by integrating an overlapping polycrystalline silicon-based gate stack in an all-Silicon and lithographically flexible 300mm flow. Low-disorder Si/SiO$_2$ is proved by a 10K Hall mobility of $1.5 cdot 10^4$ $cm^2$/Vs. Well-controlled sensors with low charge noise (3.6 $mu$eV/$sqrt{mathrm{Hz}}$ at 1 Hz) are used for charge sensing down to the last electron. We demonstrate excellent and reproducible interdot coupling control over nearly 2 decades (2-100 GHz). We show spin manipulation and single-shot spin readout, extracting a valley splitting energy of around 150 $mu$eV. These low-disorder, uniform qubit devices and 300mm fab integration pave the way for fast scale-up to large quantum processors.
We experimentally and theoretically investigate the spin orbit (SO) field in a physically defined, p type metal oxide semiconductor double quantum dot in silicon. We measure the magnetic field dependence of the leakage current through the double dot in the Pauli spin blockade. A finite magnetic field lifts the blockade, with the lifting least effective when the external and SO fields are parallel. In this way, we find that the spin flip of a tunneling hole is due to a SO field pointing perpendicular to the double dot axis and almost fully out of the quantum well plane. We augment the measurements by a derivation of SO terms using group symmetric representations theory. It predicts that without in plane electric fields (a quantum well case), the SO field would be mostly within the plane, dominated by a sum of a Rashba and a Dresselhaus like term. We, therefore, interpret the observed SO field as originated in the electric fields with substantial in plane components.
Hole spin qubits are frontrunner platforms for scalable quantum computers, but state-of-the-art devices suffer from noise originating from the hyperfine interactions with nuclear defects. We show that these interactions have a highly tunable anisotropy that is controlled by device design and external electric fields. This tunability enables sweet spots where the hyperfine noise is suppressed by an order of magnitude and is comparable to isotopically purified materials. We identify surprisingly simple designs where the qubits are highly coherent and are largely unaffected by both charge and hyperfine noise. We find that the large spin-orbit interaction typical of elongated quantum dots not only speeds up qubit operations, but also dramatically renormalizes the hyperfine noise, altering qualitatively the dynamics of driven qubits and enhancing the fidelity of qubit gates. Our findings serve as guidelines to design high performance qubits for scaling up quantum computers.
Silicon-based quantum bits with electron spins in quantum dots or nuclear spins on dopants are serious contenders in the race for quantum computation. Added to process integration maturity, the lack of nuclear spins in the most abundant $^{28}$silicon isotope host crystal for qubits is a major asset for this silicon quantum technology. We have grown $^{28}$silicon epitaxial layers (epilayers) with an isotopic purity greater than 99.992 % on 300mm natural abundance silicon crystals. The quality of the mono-crystalline isotopically purified epilayer conforms to the same drastic quality requirements as the natural epilayers used in our pre-industrial CMOS facility. The isotopically purified substrates are now ready for the fabrication of silicon qubits using a state-of-the-art 300 mm Si CMOS-foundries equipment and processes
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