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Register a new userOptimization of Quantum Circuit Mapping using Gate Transformation and Commutation
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This paper addresses quantum circuit mapping for Noisy Intermediate-Scale Quantum (NISQ) computers. Since NISQ computers constraint two-qubit operations on limited couplings, an input circuit must be transformed into an equivalent output circuit obeying the constraints. The transformation often requires additional gates that can affect the accuracy of running the circuit. Based upon a previous work of quantum circuit mapping that leverages gate commutation rules, this paper shows algorithms that utilize both transformation and commutation rules. Experiments on a standard benchmark dataset confirm the algorithms with more rules can find even better circuit mappings compared with the previously-known best algorithms.
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We study to what extent quantum algorithms can speed up solving convex optimization problems. Following the classical literature we assume access to a convex set via various oracles, and we examine the efficiency of reductions between the different oracles. In particular, we show how a separation oracle can be implemented using $tilde{O}(1)$ quantum queries to a membership oracle, which is an exponential quantum speed-up over the $Omega(n)$ membership queries that are needed classically. We show that a quantum computer can very efficiently compute an approximate subgradient of a convex Lipschitz function. Combining this with a simplification of recent classical work of Lee, Sidford, and Vempala gives our efficient separation oracle. This in turn implies, via a known algorithm, that $tilde{O}(n)$ quantum queries to a membership oracle suffice to implement an optimization oracle (the best known classical upper bound on the number of membership queries is quadratic). We also prove several lower bounds: $Omega(sqrt{n})$ quantum separation (or membership) queries are needed for optimization if the algorithm knows an interior point of the convex set, and $Omega(n)$ quantum separation queries are needed if it does not.
The current phase of quantum computing is in the Noisy Intermediate-Scale Quantum (NISQ) era. On NISQ devices, two-qubit gates such as CNOTs are much noisier than single-qubit gates, so it is essential to minimize their count. Quantum circuit synthesis is a process of decomposing an arbitrary unitary into a sequence of quantum gates, and can be used as an optimization tool to produce shorter circuits to improve overall circuit fidelity. However, the time-to-solution of synthesis grows exponentially with the number of qubits. As a result, synthesis is intractable for circuits on a large qubit scale. In this paper, we propose a hierarchical, block-by-block optimization framework, QGo, for quantum circuit optimization. Our approach allows an exponential cost optimization to scale to large circuits. QGo uses a combination of partitioning and synthesis: 1) partition the circuit into a sequence of independent circuit blocks; 2) re-generate and optimize each block using quantum synthesis; and 3) re-compose the final circuit by stitching all the blocks together. We perform our analysis and show the fidelity improvements in three different regimes: small-size circuits on real devices, medium-size circuits on noise simulations, and large-size circuits on analytical models. Using a set of NISQ benchmarks, we show that QGo can reduce the number of CNOT gates by 29.9% on average and up to 50% when compared with industrial compilers such as t|ket>. When executed on the IBM Athens system, shorter depth leads to higher circuit fidelity. We also demonstrate the scalability of our QGo technique to optimize circuits of 60+ qubits. Our technique is the first demonstration of successfully employing and scaling synthesis in the compilation toolchain for large circuits. Overall, our approach is robust for direct incorporation in production compiler toolchains.
The goal of quantum circuit transformation is to map a logical circuit to a physical device by inserting additional gates as few as possible in an acceptable amount of time. We present an effective approach called TSA to construct the mapping. It consists of two key steps: one makes use of a combined subgraph isomorphism and completion to initialize some candidate mappings, the other dynamically modifies the mappings by using tabu search-based adjustment. Our experiments show that, compared with state-of-the-art methods GA, SABRE and FiDLS proposed in the literature, TSA can generate mappings with a smaller number of additional gates and it has a better scalability for large-scale circuits.
Recently, the makespan-minimization problem of compiling a general class of quantum algorithms into near-term quantum processors has been introduced to the AI community. The research demonstrated that temporal planning is a strong approach for a class of quantum circuit compilation (QCC) problems. In this paper, we explore the use of constraint programming (CP) as an alternative and complementary approach to temporal planning. We extend previous work by introducing two new problem variations that incorporate important characteristics identified by the quantum computing community. We apply temporal planning and CP to the baseline and extended QCC problems as both stand-alone and hybrid approaches. Our hybrid methods use solutions found by temporal planning to warm start CP, leveraging the ability of the former to find satisficing solutions to problems with a high degree of task optionality, an area that CP typically struggles with. The CP model, benefiting from inferred bounds on planning horizon length and task counts provided by the warm start, is then used to find higher quality solutions. Our empirical evaluation indicates that while stand-alone CP is only competitive for the smallest problems, CP in our hybridization with temporal planning out-performs stand-alone temporal planning in the majority of problem classes.
The development of practical methods for synthesis and verification of complex photonic circuits presents a grand challenge for the nascent field of quantum engineering. Of course, classical electrical engineering provides essential foundations and serves to illustrate the degree of sophistication that can be achieved in automated circuit design. In this paper we explore the utility of term rewriting approaches to the transformation of quantum circuit models, specifically applying rewrite rules for both reduction/verification and robustness analysis of photonic circuits for autonomous quantum error correction. We outline a workflow for quantum photonic circuit analysis that leverages the Modelica framework for multi-domain physical modeling, which parallels a previously described approach based on VHSIC Hardware Description Language (VHDL).
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