No Arabic abstract
We demonstrate that the confocal laser scanning microscopy (CLSM) provides a non-destructive, highly-efficient characterization method for large-area epitaxial graphene and graphene nanostructures on SiC substrates, which can be applied in ambient air without sample preparation and is insusceptible to surface charging or surface contamination. Based on the variation of reflected intensity from regions covered by interfacial layer, single layer, bilayer, or few layer graphene, and through the correlation to the results from Raman spectroscopy and SPM, CLSM images with a high resolution (around 150 nm) reveal that the intensity contrast has distinct feature for undergrown graphene (mixing of dense, parallel graphene nanoribbons and interfacial layer), continuous graphene, and overgrown graphene. Moreover, CLSM has a real acquisition time hundreds of times faster per unit area than the supplementary characterization methods. We believe that the confocal laser scanning microscope will be an indispensable tool for mass-produced epitaxial graphene or applicable 2D materials.
We present electronic structure calculations of few-layer epitaxial graphene nanoribbons on SiC(0001). Trough an atomistic description of the graphene layers and the substrate within the extended H{u}ckel Theory and real/momentum space projections we argue that the role of the heterostructures interface becomes crucial for the conducting capacity of the studied systems. The key issue arising from this interaction is a Fermi level pinning effect introduced by dangling interface bonds. Such phenomenon is independent from the width of the considered nanostructures, compromising the importance of confinement in these systems.
Epitaxial graphene grown on SiC by the confinement controlled sublimation method is reviewed, with an emphasis on multilayer and monolayer epitaxial graphene on the carbon face of 4H-SiC and on directed and selectively grown structures under growth-arresting or growth-enhancing masks. Recent developments in the growth of templated graphene nanostructures are also presented, as exemplified by tens of micron long very well confined and isolated 20-40nm wide graphene ribbons. Scheme for large scale integration of ribbon arrays with Si wafer is also presented.
We report the realization of top-gated graphene nanoribbon field effect transistors (GNRFETs) of ~10 nm width on large-area epitaxial graphene exhibiting the opening of a band gap of ~0.14 eV. Contrary to prior observations of disordered transport and severe edge-roughness effects of GNRs, the experimental results presented here clearly show that the transport mechanism in carefully fabricated GNRFETs is conventional band-transport at room temperature, and inter-band tunneling at low temperature. The entire space of temperature, size, and geometry dependent transport properties and electrostatics of the GNRFETs are explained by a conventional thermionic emission and tunneling current model. Our combined experimental and modeling work proves that carefully fabricated narrow GNRs behave as conventional semiconductors, and remain potential candidates for electronic switching devices.
The adoption of graphene in electronics, optoelectronics and photonics is hindered by the difficulty in obtaining high quality material on technologically-relevant substrates, over wafer-scale sizes and with metal contamination levels compatible with industrial requirements. To date, the direct growth of graphene on insulating substrates has proved to be challenging, usually requiring metal-catalysts or yielding defective graphene. In this work, we demonstrate a metal-free approach implemented in commercially available reactors to obtain high-quality monolayer graphene on c-plane sapphire substrates via chemical vapour deposition (CVD). We identify via low energy electron diffraction (LEED), low energy electron microscopy (LEEM) and scanning tunneling microscopy (STM) measurements the Al-rich reconstruction root31R9 of sapphire to be crucial for obtaining epitaxial graphene. Raman spectroscopy and electrical transport measurements reveal high-quality graphene with mobilities consistently above 2000 cm2/Vs. We scale up the process to 4-inch and 6-inch wafer sizes and demonstrate that metal contamination levels are within the limits for back-end-of-line (BEOL) integration. The growth process introduced here establishes a method for the synthesis of wafer-scale graphene films on a technologically viable basis.
Graphene and related materials can lead to disruptive advances in next generation photonics and optoelectronics. The challenge is to devise growth, transfer and fabrication protocols providing high (>5,000 cm2 V-1 s-1) mobility devices with reliable performance at the wafer scale. Here, we present a flow for the integration of graphene in photonics circuits. This relies on chemical vapour deposition (CVD) of single layer graphene (SLG) matrices comprising up to ~12000 individual single crystals (SCs), grown to match the geometrical configuration of the devices in the photonic circuit. This is followed by a transfer approach which guarantees coverage over ~80% of the device area, and integrity for up to 150 mm wafers, with room temperature mobility ~5000 cm2 V-1 s-1. We use this process flow to demonstrate double SLG electro-absorption modulators with modulation efficiency ~0.25, 0.45, 0.75, 1 dB V-1 for device lengths ~30, 60, 90, 120 {mu}m. The data rate is up to 20 Gbps. Encapsulation with single-layer hBN is used to protected SLG during plasma-enhanced CVD of Si3N4, ensuring reproducible device performance. Our full process flow (from growth to device fabrication) enables the commercial implementation of graphene-based photonic devices.