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Register a new userX-ray Radiation Hardness of Fully-Depleted SOI MOSFETs and Its Improvement
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X-ray radiation hardness of FD-SOI n- and p-MOSFET has been investigated. After 1.4 kGy(Si) irradiation, 15% drain current increase for n-MOSFET and 20% drain current decrease for p-MOSFET are observed. From analysis of gmmax-Vsub, the major cause of n-MOSFET drain current change is the generated positive charge in BOX. On the other hand, the major cause of p-MOSFET drain current change is the radiation induced gate channel modulation by the generated positive charge in sidewall spacer. It is confirmed that the p-MOSFET drain current change is improved by higher PLDD dose. Thinner BOX is also proposed for further radiation hardness improvement.
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X-ray SOI pixel sensors, XRPIX, are being developed for the next-generation X-ray astronomical satellite, FORCE. The XRPIX are fabricated with the SOI technology, which makes it possible to integrate a high-resistivity Si sensor and a low-resistivity Si CMOS circuit. The CMOS circuit in each pixel is equipped with a trigger function, allowing us to read out outputs only from the pixels with X-ray signals at the timing of X-ray detection. This function thus realizes high throughput and high time resolution, which enables to employ anti-coincidence technique for background rejection. A new series of XRPIX named XRPIX6E developed with a pinned depleted diode (PDD) structure improves spectral performance by suppressing the interference between the sensor and circuit layers. When semiconductor X-ray sensors are used in space, their spectral performance is generally degraded owing to the radiation damage caused by high-energy protons. Therefore, before using an XRPIX in space, it is necessary to evaluate the extent of degradation of its spectral performance by radiation damage. Thus, we performed a proton irradiation experiment for XRPIX6E for the first time at HIMAC in the NIRS. We irradiated XRPIX6E with high-energy protons with a total dose of up to 40 krad, equivalent to 400 years of irradiation in orbit. The 40-krad irradiation degraded the energy resolution of XRPIX6E by 25 $pm$ 3%, yielding an energy resolution of 260.1 $pm$ 5.6 eV at the full width half maximum for 5.9 keV X-rays. However, the value satisfies the requirement for FORCE, 300 eV at 6 keV, even after the irradiation. It was also found that the PDD XRPIX has enhanced radiation hardness compared to previous XRPIX devices. In addition, we investigated the degradation of the energy resolution; it was shown that the degradation would be due to increasing energy-independent components, e.g., readout noise.
The X-ray SOI pixel sensor onboard the FORCE satellite will be placed in the low earth orbit and will consequently suffer from the radiation effects mainly caused by geomagnetically trapped cosmic-ray protons. Based on previous studies on the effects of radiation on SOI pixel sensors, the positive charges trapped in the oxide layer significantly affect the performance of the sensor. To improve the radiation hardness of the SOI pixel sensors, we introduced a double-SOI (D-SOI) structure containing an additional middle Si layer in the oxide layer. The negative potential applied on the middle Si layer compensates for the radiation effects, due to the trapped positive charges. Although the radiation hardness of the D-SOI pixel sensors for applications in high-energy accelerators has been evaluated, radiation effects for astronomical application in the D-SOI sensors has not been evaluated thus far. To evaluate the radiation effects of the D-SOI sensor, we perform an irradiation experiment using a 6-MeV proton beam with a total dose of ~ 5 krad, corresponding to a few tens of years of in-orbit operation. This experiment indicates an improvement in the radiation hardness of the X- ray D-SOI devices. On using an irradiation of 5 krad on the D-SOI device, the energy resolution in the full-width half maximum for the 5.9-keV X-ray increases by 7 $pm$ 2%, and the chip output gain decreases by 0.35 $pm$ 0.09%. The physical mechanism of the gain degradation is also investigated; it is found that the gain degradation is caused by an increase in the parasitic capacitance due to the enlarged buried n-well.
Pixel detectors are used in the innermost part of the multi purpose experiments at LHC and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of all detector components has thoroughly been tested up to the fluences expected at the LHC. In case of an LHC upgrade, the fluence will be much higher and it is not yet clear how long the present pixel modules will stay operative in such a harsh environment. The aim of this study was to establish such a limit as a benchmark for other possible detector concepts considered for the upgrade. As the sensors and the readout chip are the parts most sensitive to radiation damage, samples consisting of a small pixel sensor bump-bonded to a CMS-readout chip (PSI46V2.1) have been irradiated with positive 200 MeV pions at PSI up to 6E14 Neq and with 21 GeV protons at CERN up to 5E15 Neq. After irradiation the response of the system to beta particles from a Sr-90 source was measured to characterise the charge collection efficiency of the sensor. Radiation induced changes in the readout chip were also measured. The results show that the present pixel modules can be expected to be still operational after a fluence of 2.8E15 Neq. Samples irradiated up to 5E15 Neq still see the beta particles. However, further tests are needed to confirm whether a stable operation with high particle detection efficiency is possible after such a high fluence.
This paper reports the first cryogenic characterization of 28nm Fully-Depleted-SOI CMOS technology. A comprehensive study of digital/analog performances and body-biasing from room to the liquid helium temperature is presented. Despite a cryogenic operation, effectiveness of body-biasing remains unchanged and provides an excellent $V_{TH}$ controllability. Low-temperature operation enables higher drive current and a largely reduced subthreshold swing (down to 7mV/dec). FDSOI can provide a valuable approach to cryogenic low-power electronics. Applications such as classical control hardware for quantum processors are envisioned.
The experiment of the future electron-positron colliders has unprecedented requirements on the vertex resolution, such as around 3micron single point resolution for the inner most detector layer, with fast readout, and very low power-consumption density and material budget. Significant efforts have been put into the development of monolithic silicon pixel sensors, but there have been some challenges to combine all those stringent specifications in a small pixel area. This paper presents a compact prototype pixel sensor fabricated in LAPIS 200nm SOI process and focuses on the characterization of low capacitance of the sensing node with a pinned depleted diode structure adopting a novel method of forward bias voltage and AC coupling on the diode. Three PDD structures with 16 micron by 20 micron pixel size were designed and compared using radioactive sources and injected charge. The measured result shows that the designed PDD structure has very low leakage current and around 3.5fF of equivalent input capacitance.
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