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Register a new userHigh-Voltage Field Effect Transistors with Wide-Bandgap {beta}-Ga2O3 Nanomembranes
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Nanoscale semiconductor materials have been extensively investigated as the channel materials of transistors for energy-efficient low-power logic switches to enable scaling to smaller dimensions. On the opposite end of transistor applications is power electronics for which transistors capable of switching very high voltages are necessary. Miniaturization of energy-efficient power switches can enable the integration with various electronic systems and lead to substantial boosts in energy efficiency. Nanotechnology is yet to have an impact in this arena. In this work, it is demonstrated that nanomembranes of the wide-bandgap semiconductor gallium oxide can be used as channels of transistors capable of switching high voltages, and at the same time can be integrated on any platform. The findings mark a step towards using lessons learnt in nanomaterials and nanotechnology to address a challenge that yet remains untouched by the field.
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Bottom-up synthesized GNRs and GNR heterostructures have promising electronic properties for high performance field effect transistors (FETs) and ultra-low power devices such as tunnelling FETs. However, the short length and wide band gap of these GNRs have prevented the fabrication of devices with the desired performance and switching behaviour. Here, by fabricating short channel (Lch ~20 nm) devices with a thin, high-k gate dielectric and a 9-atom wide (0.95 nm) armchair GNR as the channel material, we demonstrate FETs with high on-current (Ion >1 uA at Vd = -1 V) and high Ion/Ioff ~10^5 at room temperature. We find that the performance of these devices is limited by tunnelling through the Schottky barrier (SB) at the contacts and we observe an increase in the transparency of the barrier by increasing the gate field near the contacts. Our results thus demonstrate successful fabrication of high performance short-channel FETs with bottom-up synthesized armchair GNRs.
Magnetic skyrmions are of considerable interest for low-power memory and logic devices because of high speed at low current and high stability due to topological protection. We propose a skyrmion field-effect transistor based on a gate-controlled Dzyaloshinskii-Moriya interaction. A key working principle of the proposed skyrmion field-effect transistor is a large transverse motion of skyrmion, caused by an effective equilibrium damping-like spin-orbit torque due to spatially inhomogeneous Dzyaloshinskii-Moriya interaction. This large transverse motion can be categorized as the skyrmion Hall effect, but has been unrecognized previously. The propose device is capable of multi-bit operation and Boolean functions, and thus is expected to serve as a low-power logic device based on the magnetic solitons.
In this letter, we report on high performance depletion/enhancement (D/E)-mode beta-Ga2O3 on insulator (GOOI) field-effect transistors (FETs) with record high drain currents (ID) of 600/450 mA/mm, which are nearly one order of magnitude higher than any other reported ID values. The threshold voltage (VT) can be modulated by varying the thickness of the beta-Ga2O3 films and the E-mode GOOI FET can be simply achieved by shrinking the beta-Ga2O3 film thickness. Benefiting from the good interface between beta-Ga2O3 and SiO2 and wide bandgap of beta-Ga2O3, a negligible transfer characteristic hysteresis, high ID on/off ratio of 10^10, and low subthreshold swing of 140 mV/dec for a 300 nm thick SiO2 are observed. E-mode GOOI FET with source to drain spacing of 0.9 um demonstrates a breakdown voltage of 185 V and an average electric field (E) of 2 MV/cm, showing the great promise of GOOI FET for future power devices.
We demonstrate dual-gated $p$-type field-effect transistors (FETs) based on few-layer tungsten diselenide (WSe$_2$) using high work-function platinum source/drain contacts, and a hexagonal boron nitride top-gate dielectric. A device topology with contacts underneath the WSe$_2$ results in $p$-FETs with $I_{ON}$/$I_{OFF}$ ratios exceeding 10$^7$, and contacts that remain Ohmic down to cryogenic temperatures. The output characteristics show current saturation and gate tunable negative differential resistance. The devices show intrinsic hole mobilities around 140 cm$^2$/Vs at room temperature, and approaching 4,000 cm$^2$/Vs at 2 K. Temperature-dependent transport measurements show a metal-insulator transition, with an insulating phase at low densities, and a metallic phase at high densities. The mobility shows a strong temperature dependence consistent with phonon scattering, and saturates at low temperatures, possibly limited by Coulomb scattering, or defects.
The spin field effect transistor envisioned by Datta and Das opens a gateway to spin information processing. Although the coherent manipulation of electron spins in semiconductors is now possible, the realization of a functional spin field effect transistor for information processing has yet to be achieved, owing to several fundamental challenges such as the low spin-injection efficiency due to resistance mismatch, spin relaxation, and the spread of spin precession angles. Alternative spin transistor designs have therefore been proposed, but these differ from the field effect transistor concept and require the use of optical or magnetic elements, which pose difficulties for the incorporation into integrated circuits. Here, we present an all-electric and all-semiconductor spin field effect transistor, in which these obstacles are overcome by employing two quantum point contacts as spin injectors and detectors. Distinct engineering architectures of spin-orbit coupling are exploited for the quantum point contacts and the central semiconductor channel to achieve complete control of the electron spins -- spin injection, manipulation, and detection -- in a purely electrical manner. Such a device is compatible with large-scale integration and hold promise for future spintronic devices for information processing.
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