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We propose a new class of mathematical structures called (m,n)-semirings} (which generalize the usual semirings), and describe their basic properties. We also define partial ordering, and generalize the concepts of congruence, homomorphism, ideals, etc., for (m,n)-semirings. Following earlier work by Rao, we consider a system as made up of several components whose failures may cause it to fail, and represent the set of systems algebraically as an (m,n)-semiring. Based on the characteristics of these components we present a formalism to compare the fault tolerance behaviour of two systems using our framework of a partially ordered (m,n)-semiring.
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We propose a new class of algebraic structure named as emph{$(m,n)$-semihyperring} which is a generalization of usual emph{semihyperring}. We define the basic properties of $(m,n)$-semihyperring like identity elements, weak distributive $(m,n)$-semihyperring, zero sum free, additively idempotent, hyperideals, homomorphism, inclusion homomorphism, congruence relation, quotient $(m,n)$-semihyperring etc. We propose some lemmas and theorems on homomorphism, congruence relation, quotient $(m,n)$-semihyperring, etc and prove these theorems. We further extend it to introduce the relationship between fuzzy sets and $(m,n)$-semihyperrings and propose fuzzy hyperideals and homomorphism theorems on fuzzy $(m,n)$-semihyperrings and the relationship between fuzzy $(m,n)$-semihyperrings and the usual $(m,n)$-semihyperrings.
We extensively test a recent protocol to demonstrate quantum fault tolerance on three systems: (1) a real-time simulation of five spin qubits coupled to an environment with two-level defects, (2) a real-time simulation of transmon quantum computers, and (3) the 16-qubit processor of the IBM Q Experience. In the simulations, the dynamics of the full system is obtained by numerically solving the time-dependent Schrodinger equation. We find that the fault-tolerant scheme provides a systematic way to improve the results when the errors are dominated by the inherent control and measurement errors present in transmon systems. However, the scheme fails to satisfy the criterion for fault tolerance when decoherence effects are dominant.
Machine learning (ML) provides us with numerous opportunities, allowing ML systems to adapt to new situations and contexts. At the same time, this adaptability raises uncertainties concerning the run-time product quality or dependability, such as reliability and security, of these systems. Systems can be tested and monitored, but this does not provide protection against faults and failures in adapted ML systems themselves. We studied software designs that aim at introducing fault tolerance in ML systems so that possible problems in ML components of the systems can be avoided. The research was conducted as a case study, and its data was collected through five semi-structured interviews with experienced software architects. We present a conceptualisation of the misbehaviour of ML systems, the perceived role of fault tolerance, and the designs used. Common patterns to incorporating ML components in design in a fault tolerant fashion have started to emerge. ML models are, for example, guarded by monitoring the inputs and their distribution, and enforcing business rules on acceptable outputs. Multiple, specialised ML models are used to adapt to the variations and changes in the surrounding world, and simpler fall-over techniques like default outputs are put in place to have systems up and running in the face of problems. However, the general role of these patterns is not widely acknowledged. This is mainly due to the relative immaturity of using ML as part of a complete software system: the field still lacks established frameworks and practices beyond training to implement, operate, and maintain the software that utilises ML. ML software engineering needs further analysis and development on all fronts.
In the framework quotient algebra partition, a general methodology is introduced to construct fault tolerant encodes for an arbitrary action in an error-correcting code.
The Network-on-Chips is a promising candidate for addressing communication bottlenecks in many-core processors and neural network processors. In this work, we consider the generalized fault-tolerance topology generation problem, where the link or switch failures can happen, for application-specific network-on-chips (ASNoC). With a user-defined number, K, we propose an integer linear programming (ILP) based method to generate ASNoC topologies, which can tolerate at most K faults in switches or links. Given the communication requirements between cores and their floorplan, we first propose a convex-cost-flow based method to solve a core mapping problem for building connections between the cores and switches. Second, an ILP based method is proposed to allocate K+1 switch-disjoint routing paths for every communication flow between the cores. Finally, to reduce switch sizes, we propose sharing the switch ports for the connections between the cores and switches and formulate the port sharing problem as a clique-partitioning problem Additionally, we propose an ILP-based method to simultaneously solve the core mapping and routing path allocation problems when considering physical link failures only. Experimental results show that the power consumptions of fault-tolerance topologies increase almost linearly with K because of the routing path redundancy. When both switch faults and link faults are considered, port sharing can reduce the average power consumption of fault-tolerance topologies with K = 1, K = 2 and K = 3 by 18.08%, 28.88%, and 34.20%, respectively. When considering only the physical link faults, the experimental results show that compared to the FTTG algorithm, the proposed method reduces power consumption and hop count by 10.58% and 6.25%, respectively; compared to the DBG based method, the proposed method reduces power consumption and hop count by 21.72% and 9.35%, respectively.
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