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Three types of first generation epitaxial graphene field effect transistors (FET) are presented and their relative merits are discussed. Graphene is epitaxially grown on both the carbon and silicon faces of hexagonal silicon carbide and patterned with electron beam lithography. The channels have a Hall bar geometry to facilitate magnetoresistance measurements. FETs patterned on the Si-face exhibit off-to-on channel resistance ratios that exceed 30. C-face FETs have lower off-to-on resistance ratios, but their mobilities (up to 5000 cm2/Vs) are much larger than that for Si-face transistors. Initial investigations into all-graphene side gate FET structures are promising.
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Top-gated, few-layer graphene field-effect transistors (FETs) fabricated on thermally-decomposed semi-insulating 4H-SiC substrates are demonstrated. Physical vapor deposited SiO2 is used as the gate dielectric. A two-dimensional hexagonal arrangement of carbon atoms with the correct lattice vectors, observed by high-resolution scanning tunneling microscopy, confirms the formation of multiple graphene layers on top of the SiC substrates. The observation of n-type and p-type transition further verifies Dirac Fermions unique transport properties in graphene layers. The measured electron and hole mobility on these fabricated graphene FETs are as high as 5400 cm2/Vs and 4400 cm2/Vs respectively, which are much larger than the corresponding values from conventional SiC or silicon.
The high-frequency transconductance and current noise of top-gated single carbon nanotube transistors have been measured and used to investigate hot electron effects in one-dimensional transistors. Results are in good agreement with a theory of 1-dimensional nano-transistor. In particular the prediction of a large transconductance correction to the Johnson-Nyquist thermal noise formula is confirmed experimentally. Experiment shows that nanotube transistors can be used as fast charge detectors for quantum coherent electronics with a resolution of $13mathrm{mu e/sqrt{Hz}}$ in the 0.2-$0.8 mathrm{GHz}$ band.
This paper describes the behavior of top gated transistors fabricated using carbon, particularly epitaxial graphene on SiC, as the active material. In the past decade research has identified carbon-based electronics as a possible alternative to silicon-based electronics. This enthusiasm was spurred by high carbon nanotube carrier mobilities. However, nanotube production, placement, and control are all serious issues. Graphene, a thin sheet of graphitic carbon, can overcome some of these problems and therefore is a promising new electronic material. Although graphene devices have been built before, in this work we provide the first demonstration and systematic evaluation of arrays of a large number of transistors entirely produced using standard microelectronics methods. Graphene devices presented feature high-k dielectric, mobilities up to 5000 cm2/Vs and, Ion/Ioff ratios of up to 7, and are methodically analyzed to provide insight into the substrate properties. Typical of graphene, these micron-scale devices have negligible band gaps and therefore large leakage currents.
We report results of experimental investigation of the low-frequency noise in the top-gate graphene transistors. The back-gate graphene devices were modified via addition of the top gate separated by 20 nm of HfO2 from the single-layer graphene channels. The measurements revealed low flicker noise levels with the normalized noise spectral density close to 1/f (f is the frequency) and Hooge parameter below 2 x 10^-3. The analysis of the noise spectral density dependence on the top and bottom gate biases helped us to elucidate the noise sources in these devices and develop a strategy for the electronic noise reduction. The obtained results are important for all proposed graphene applications in electronics and sensors.
For the first time, n-type few-layer MoS2 field-effect transistors with graphene/Ti as the hetero-contacts have been fabricated, showing more than 160 mA/mm drain current at 1 {mu}m gate length with an on-off current ratio of 107. The enhanced electrical characteristic is confirmed in a nearly 2.1 times improvement in on-resistance and a 3.3 times improvement in contact resistance with hetero-contacts compared to the MoS2 FETs without graphene contact layer. Temperature dependent study on MoS2/graphene hetero-contacts has been also performed, still unveiling its Schottky contact nature. Transfer length method and a devised I-V method have been introduced to study the contact resistance and Schottky barrier height in MoS2/graphene /metal hetero-contacts structure.
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