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High-fidelity two-qubit gates in silicon above one Kelvin

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 Added by Luca Petit
 Publication date 2020
  fields Physics
and research's language is English




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Spin qubits in quantum dots define an attractive platform for scalable quantum information because of their compatibility with semiconductor manufacturing, their long coherence times, and the ability to operate at temperatures exceeding one Kelvin. Qubit logic can be implemented by pulsing the exchange interaction or via driven rotations. Here, we show that these approaches can be combined to execute a multitude of native two-qubit gates in a single device, reducing the operation overhead to perform quantum algorithms. We demonstrate, at a temperature above one Kelvin, single-qubit rotations together with the two-qubit gates CROT, CPHASE and SWAP. Furthermore we realize adiabatic, diabatic and composite sequences to optimize the qubit control fidelity and the gate time. We find two-qubit gates that can be executed within 67 ns and by theoretically analyzing the experimental noise sources we predict fidelities exceeding 99%. This promises fault-tolerant operation using quantum hardware that can be embedded with classical electronics for quantum integrated circuits.



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160 - W. Huang , C. H. Yang , K. W. Chan 2018
Universal quantum computation will require qubit technology based on a scalable platform, together with quantum error correction protocols that place strict limits on the maximum infidelities for one- and two-qubit gate operations. While a variety of qubit systems have shown high fidelities at the one-qubit level, superconductor technologies have been the only solid-state qubits manufactured via standard lithographic techniques which have demonstrated two-qubit fidelities near the fault-tolerant threshold. Silicon-based quantum dot qubits are also amenable to large-scale manufacture and can achieve high single-qubit gate fidelities (exceeding 99.9%) using isotopically enriched silicon. However, while two-qubit gates have been demonstrated in silicon, it has not yet been possible to rigorously assess their fidelities using randomized benchmarking, since this requires sequences of significant numbers of qubit operations ($gtrsim 20$) to be completed with non-vanishing fidelity. Here, for qubits encoded on the electron spin states of gate-defined quantum dots, we demonstrate Bell state tomography with fidelities ranging from 80% to 89%, and two-qubit randomized benchmarking with an average Clifford gate fidelity of 94.7% and average Controlled-ROT (CROT) fidelity of 98.0%. These fidelities are found to be limited by the relatively slow gate times employed here compared with the decoherence times $T_2^*$ of the qubits. Silicon qubit designs employing fast gate operations based on high Rabi frequencies, together with advanced pulsing techniques, should therefore enable significantly higher fidelities in the near future.
Recent studies of silicon spin qubits at temperatures above 1 K are encouraging demonstrations that the cooling requirements for solid-state quantum computing can be considerably relaxed. However, qubit readout mechanisms that rely on charge sensing with a single-island single-electron transistor (SISET) quickly lose sensitivity due to thermal broadening of the electron distribution in the reservoirs. Here we exploit the tunneling between two quantised states in a double-island SET (DISET) to demonstrate a charge sensor with an improvement in signal-to-noise by an order of magnitude compared to a standard SISET, and a single-shot charge readout fidelity above 99 % up to 8 K at a bandwidth > 100 kHz. These improvements are consistent with our theoretical modelling of the temperature-dependent current transport for both types of SETs. With minor additional hardware overheads, these sensors can be integrated into existing qubit architectures for high fidelity charge readout at few-kelvin temperatures.
Quantum computers are expected to outperform conventional computers for a range of important problems, from molecular simulation to search algorithms, once they can be scaled up to large numbers of quantum bits (qubits), typically millions. For most solid-state qubit technologies, e.g. those using superconducting circuits or semiconductor spins, scaling poses a significant challenge as every additional qubit increases the heat generated, while the cooling power of dilution refrigerators is severely limited at their operating temperature below 100 mK. Here we demonstrate operation of a scalable silicon quantum processor unit cell, comprising two qubits confined to quantum dots (QDs) at $sim$1.5 Kelvin. We achieve this by isolating the QDs from the electron reservoir, initialising and reading the qubits solely via tunnelling of electrons between the two QDs. We coherently control the qubits using electrically-driven spin resonance (EDSR) in isotopically enriched silicon $^{28}$Si, attaining single-qubit gate fidelities of 98.6% and coherence time $T_2^*$ = 2$mu$s during `hot operation, comparable to those of spin qubits in natural silicon at millikelvin temperatures. Furthermore, we show that the unit cell can be operated at magnetic fields as low as 0.1 T, corresponding to a qubit control frequency of 3.5 GHz, where the qubit energy is well below the thermal energy. The unit cell constitutes the core building block of a full-scale silicon quantum computer, and satisfies layout constraints required by error correction architectures. Our work indicates that a spin-based quantum computer could be operated at elevated temperatures in a simple pumped $^4$He system, offering orders of magnitude higher cooling power than dilution refrigerators, potentially enabling classical control electronics to be integrated with the qubit array.
A two-qubit controlled-NOT (CNOT) gate, realized by a controlled-phase (C-phase) gate combined with single-qubit gates, has been experimentally implemented recently for quantum-dot spin qubits in isotopically enriched silicon, a promising solid-state system for practical quantum computation. In the experiments, the single-qubit gates have been demonstrated with fault-tolerant control-fidelity, but the infidelity of the two-qubit C-phase gate is, primarily due to the electrical noise, still higher than the required error threshold for fault-tolerant quantum computation (FTQC). Here, by taking the realistic system parameters and the experimental constraints on the control pulses into account, we construct experimentally realizable high-fidelity CNOT gates robust against electrical noise with the experimentally measured $1/f^{1.01}$ noise spectrum and also against the uncertainty in the interdot tunnel coupling amplitude. Our optimal CNOT gate has about two orders of magnitude improvement in gate infidelity over the ideal C-phase gate constructed without considering any noise effect. Furthermore, within the same control framework, high-fidelity and robust single-qubit gates can also be constructed, paving the way for large-scale FTQC.
The flip-flop qubit, encoded in the states with antiparallel donor-bound electron and donor nuclear spins in silicon, showcases long coherence times, good controllability, and, in contrast to other donor-spin-based schemes, long-distance coupling. Electron spin control near the interface, however, is likely to shorten the relaxation time by many orders of magnitude, reducing the overall qubit quality factor. Here, we theoretically study the multilevel system that is formed by the interacting electron and nuclear spins and derive analytical effective two-level Hamiltonians with and without periodic driving. We then propose an optimal control scheme that produces fast and robust single-qubit gates in the presence of low-frequency noise and relatively weak magnetic fields without relying on parametrically restrictive sweet spots. This scheme increases considerably both the relaxation time and the qubit quality factor.
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