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Quadrilateral layouts on surfaces are valuable in texture mapping, and essential in generation of quadrilateral meshes and in fitting splines. Previous work has characterized such layouts as a special metric on a surface or as a meromorphic quartic differential with finite trajectories. In this work, a surface quadrilateral layout is alternatively characterized as a special immersion of a cut representation of the surface into the Euclidean plane. We call this a quad layout immersion. This characterization, while posed in smooth topology, naturally generalizes to piecewise-linear representations. As such, it mathematically describes and generalizes integer grid maps, which are common in computer graphics settings. Finally, the utility of the representation is demonstrated by computationally extracting quadrilateral layouts on surfaces of interest.
Given an initial placement of a set of rectangles in the plane, we consider the problem of finding a disjoint placement of the rectangles that minimizes the area of the bounding box and preserves the orthogonal order i.e. maintains the sorted orderin
Stress, edge crossings, and crossing angles play an important role in the quality and readability of graph drawings. Most standard graph drawing algorithms optimize one of these criteria which may lead to layouts that are deficient in other criteria.
We propose a novel approach for constraint-based graphical user interface (GUI) layout based on OR-constraints (ORC) in standard soft/hard linear constraint systems. ORC layout unifies grid layout and flow layout, supporting both their features as we
The UA9 experimental equipment was installed in the CERN-SPS in March 09 with the aim of investigating crystal assisted collimation in coasting mode. Its basic layout comprises silicon bent crystals acting as primary collimators mounted inside two
ALIGN (Analog Layout, Intelligently Generated from Netlists) is an open-source automatic layout generation flow for analog circuits. ALIGN translates an input SPICE netlist to an output GDSII layout, specific to a given technology, as specified by a