We develop a robust and versatile platform to define nanostructures at oxide interfaces via patterned top gates. Using LaAlO$_3$/SrTiO$_3$ as a model system, we demonstrate controllable electrostatic confinement of electrons to nanoscale regions in the conducting interface. The excellent gate response, ultra-low leakage currents, and long term stability of these gates allow us to perform a variety of studies in different device geometries from room temperature down to 50 mK. Using a split-gate device we demonstrate the formation of a narrow conducting channel whose width can be controllably reduced via the application of appropriate gate voltages. We also show that a single narrow gate can be used to induce locally a superconducting to insulating transition. Furthermore, in the superconducting regime we see indications of a gate-voltage controlled Josephson effect.
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