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تسجيل مستخدم جديدCharacterization of SOI pixel sensor using pinned depleted diode structure with AC-coupling on the diode
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Jing Dong
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The experiment of the future electron-positron colliders has unprecedented requirements on the vertex resolution, such as around 3micron single point resolution for the inner most detector layer, with fast readout, and very low power-consumption density and material budget. Significant efforts have been put into the development of monolithic silicon pixel sensors, but there have been some challenges to combine all those stringent specifications in a small pixel area. This paper presents a compact prototype pixel sensor fabricated in LAPIS 200nm SOI process and focuses on the characterization of low capacitance of the sensing node with a pinned depleted diode structure adopting a novel method of forward bias voltage and AC coupling on the diode. Three PDD structures with 16 micron by 20 micron pixel size were designed and compared using radioactive sources and injected charge. The measured result shows that the designed PDD structure has very low leakage current and around 3.5fF of equivalent input capacitance.
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X-ray SOI pixel sensors, XRPIX, are being developed for the next-generation X-ray astronomical satellite, FORCE. The XRPIX are fabricated with the SOI technology, which makes it possible to integrate a high-resistivity Si sensor and a low-resistivity
Si CMOS circuit. The CMOS circuit in each pixel is equipped with a trigger function, allowing us to read out outputs only from the pixels with X-ray signals at the timing of X-ray detection. This function thus realizes high throughput and high time resolution, which enables to employ anti-coincidence technique for background rejection. A new series of XRPIX named XRPIX6E developed with a pinned depleted diode (PDD) structure improves spectral performance by suppressing the interference between the sensor and circuit layers. When semiconductor X-ray sensors are used in space, their spectral performance is generally degraded owing to the radiation damage caused by high-energy protons. Therefore, before using an XRPIX in space, it is necessary to evaluate the extent of degradation of its spectral performance by radiation damage. Thus, we performed a proton irradiation experiment for XRPIX6E for the first time at HIMAC in the NIRS. We irradiated XRPIX6E with high-energy protons with a total dose of up to 40 krad, equivalent to 400 years of irradiation in orbit. The 40-krad irradiation degraded the energy resolution of XRPIX6E by 25 $pm$ 3%, yielding an energy resolution of 260.1 $pm$ 5.6 eV at the full width half maximum for 5.9 keV X-rays. However, the value satisfies the requirement for FORCE, 300 eV at 6 keV, even after the irradiation. It was also found that the PDD XRPIX has enhanced radiation hardness compared to previous XRPIX devices. In addition, we investigated the degradation of the energy resolution; it was shown that the degradation would be due to increasing energy-independent components, e.g., readout noise.
We have been developing a monolithic active pixel sensor, ``XRPIX``, for the Japan led future X-ray astronomy mission ``FORCE`` observing the X-ray sky in the energy band of 1-80 keV with angular resolution of better than 15``. XRPIX is an upper part
of a stack of two sensors of an imager system onboard FORCE, and covers the X-ray energy band lower than 20 keV. The XRPIX device consists of a fully depleted high-resistivity silicon sensor layer for X-ray detection, a low resistivity silicon layer for CMOS readout circuit, and a buried oxide layer in between, which is fabricated with 0.2 $mu$ m CMOS silicon-on-insulator (SOI) technology. Each pixel has a trigger circuit with which we can achieve a 10 $mu$ s time resolution, a few orders of magnitude higher than that with X-ray astronomy CCDs. We recently introduced a new type of a device structure, a pinned depleted diode (PDD), in the XRPIX device, and succeeded in improving the spectral performance, especially in a readout mode using the trigger function. In this paper, we apply a mesh experiment to the XRPIX devices for the first time in order to study the spectral response of the PDD device at the subpixel resolution. We confirmed that the PDD structure solves the significant degradation of the charge collection efficiency at the pixel boundaries and in the region under the pixel circuits, which is found in the single SOI structure, the conventional type of the device structure. On the other hand, the spectral line profiles are skewed with low energy tails and the line peaks slightly shift near the pixel boundaries, which contribute to a degradation of the energy resolution.
We have been developing event driven X-ray Silicon-On-Insulator (SOI) pixel sensors, called XRPIX, for the next generation of X-ray astronomy satellites. XRPIX is a monolithic active pixel sensor, fabricated using the SOI CMOS technology, and is equi
pped with the so-called Event-Driven readout, which allows reading out only hit pixels by using the trigger circuit implemented in each pixel. The current version of XRPIX has lower spectral performance in the Event-Driven readout mode than in the Frame readout mode, which is due to the interference between the sensor layer and the circuit layer. The interference also lowers the gain. In order to suppress the interference, we developed a new device, XRPIX6E equipped with the Pinned Depleted Diode structure. A sufficiently highly-doped buried p-well is formed at the interface between the buried oxide layer and the sensor layer, and acts as a shield layer. XRPIX6E exhibits improved spectral performances both in the Event-Driven readout mode and in the Frame readout mode in comparison to previous devices. The energy resolutions in full width at half maximum at 6.4 keV are 236 $pm$ 1 eV and 335 $pm$ 4 eV in the Frame and Event-Driven readout modes, respectively. There are differences between the readout noise and the spectral performance in the two modes, which suggests that some mechanism still degrades the performance in the Event-Driven readout mode.
SOI (Silicon-On-Insulator) pixel sensor is promising technology for developing the high position resolution detector by integrating the small pixels and circuits in the monolithic way. The event driven (trigger mode) SOI based pixel sensor has also b
een developed for the application of X-ray astronomy with the purpose of reducing the noise using anti-coincidence event. This trigger mode SOI pixel sensor working with in the rate of kilo Hz is also a promising scatter detector for advanced Compton imaging to track the Compton recoiled electrons.
An improved SOI-MAPS (Silicon On Insulator Monolithic Active Pixel Sensor) for ionizing radiation based on thick-film High Voltage SOI technology (HV-SOI) has been developed. Similar to existing Fully Depleted SOI-based (FD-SOI) MAPS, a buried silico
n oxide inter-dielectric (BOX) layer is used to separate the CMOS electronics from the handle wafer which is used as a depleted charge collection layer. FD-SOI MAPS suffer from radiation damage such as transistor threshold voltage shifts due to charge traps in the oxide layers and charge states created at the silicon oxide boundaries (back gate effect). The X-FAB 180-nm HV-SOI technology offers an additional isolation by deep non-depleted implant between the BOX layer and the active circuitry witch mitigates this problem. Therefore we see in this technology a high potential to implement radiation-tolerant MAPS with fast charge collection property. The design and measurement results from a first prototype are presented including charge collection in neutron irradiated samples.
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