This article describes the design methodology to achieve reflective diode-based parametric frequency selective limiters (pFSLs) with low power thresholds ($P_{th}$) and sub-dB insertion-loss values ($IL^{s.s}$) for driving power levels ($P_{in}$) lower than $P_{th}$. In addition, we present the measured performance of a reflective pFSL designed through the discussed methodology and assembled on a FR-4 printed circuit board (PCB). Thanks to its optimally engineered dynamics, the built pFSL can operate around $sim$2.1 GHz while exhibiting record-low $P_{th}$ (-3.4 dBm) and $IL^{s.s}$ (0.94 dB) values. Furthermore, while the pFSL can selectively attenuate undesired signals with power ranging from -3.4 dBm to 13 dBm, it provides a strong suppression level (IS > 12.0 dB) even when driven by much higher $P_{in}$ values approaching 28 dBm. Such measured performance metrics demonstrate how the unique nonlinear dynamics of parametric-based FSLs can be leveraged through components and systems compatible with conventional chip-scale manufacturing processes in order to increase the resilience to electromagnetic interference (EMI), even of wireless radios designed for a low-power consumption and consequently characterized by a narrow dynamic range.
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