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Physical challenges at the device and interconnect level limit both network and computing energy efficiency. While photonics is being considered to address interconnect bottlenecks, optical routing is still limited by electronic circuitry, requiring substantial overhead for optical-electrical-optical conversion. Here we show a novel design of an integrated broadband photonic-plasmonic hybrid device termed MODetector featuring dual light modulation and detection function to act as an optical transceiver in the photonic network-on-chip. With over 10 dB extinction ratio and 0.8 dB insertion loss at the modulation state, this MODetector provides 0.7 W/A responsivity in the detection state with 36 ps response time. This multi-functional device: (i) eliminates OEO conversion, (ii) reduces optical losses from photodetectors when not needed, and (iii) enables cognitive routing strategies for network-on-chips.
Integrated electrical and photonic circuits (PIC) operating at cryogenic temperatures are fundamental building blocks required to achieve scalable quantum computing, and cryogenic computing technologies. Optical interconnects offer better performance
Electro-optic signal modulation provides a key functionality in modern technology and information networks. Photonic integration has enabled not only miniaturizing photonic components, but also provided performance improvements due to co-design addre
We present a chip-scale scanning dual-comb spectroscopy (SDCS) approach for broadband ultrahigh-resolution spectral acquisition. SDCS uses Si3N4 microring resonators that generate two single soliton micro-combs spanning 37 THz (300 nm) on the same ch
Modern fiber-optic coherent communications employ advanced spectrally-efficient modulation formats that require sophisticated narrow linewidth local oscillators (LOs) and complex digital signal processing (DSP). Here, we establish a novel approach to
Superconducting digital circuits are a promising approach to build packaged-level integrated systems with high energy-efficiency and computational density. In such systems, performance of the data link between chips mounted on a multi-chip module (MC