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We are developing a superconductor electronics fabrication process with up to nine planarized superconducting layers, stackable stud vias, self-shunted Nb/AlOx-Al/Nb Josephson junctions, and one layer of MoNx kinetic inductors. The minimum feature size of resistors and inductors in the process is 250 nm. We present data on the mutual inductance of Nb stripline and microstrip inductors with linewidth and spacing from 250 nm to 1 {mu}m made on the same or adjacent Nb layers, as well as the data on the linewidth and resistance uniformity.
We present our new fabrication Process for Superconductor Electronics (PSE2) that integrates two (2) layers of Josephson junctions in a fully planarized multilayer process on 200-mm wafers. The two junction layers can be, e.g., conventional Supercond
Recent progress in superconductor electronics fabrication has enabled single-flux-quantum (SFQ) digital circuits with close to one million Josephson junctions (JJs) on 1-cm$^2$ chips. Increasing the integration scale further is challenging because of
In this letter, we present the study of the high-frequency mixing properties of ion irradiated YBa2Cu3O7 Josephson nano-junctions. The frequency range, spanning above and below the characteristic frequencies fc of the junctions, permits clear observa
We present a cluster algorithm for resistively shunted Josephson junctions and similar physical systems, which dramatically improves sampling efficiency. The algorithm combines local updates in Fourier space with rejection-free cluster updates which
Conventional Josephson metal-insulator-metal devices are inherently underdamped and exhibit hysteretic current-voltage response due to a very high subgap resistance compared to that in the normal state. At the same time, overdamped junctions with sin