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Multi-valued logic gates, which can handle quaternary numbers as inputs, are developed by exploiting the ballistic transport properties of quantum point contacts in series. The principle of a logic gate that finds the minimum of two quaternary number inputs is demonstrated. The device is scalable to allow multiple inputs, which makes it possible to find the minimum of multiple inputs in a single gate operation. Also, the principle of a half-adder for quaternary number inputs is demonstrated. First, an adder that adds up two quaternary numbers and outputs the sum of inputs is demonstrated. Second, a device to express the sum of the adder into two quaternary digits [Carry (first digit) and Sum (second digit)] is demonstrated. All the logic gates presented in this paper can in principle be extended to allow decimal number inputs with high quality QPCs.
Linear and non-linear transport properties through an atomic-size point contact based on oxides two-dimensional electron gas is examined using the tight-binding method and the $mathbf{kcdot p}$ approach. The ballistic transport is analyzed in contact
We study nonlinear transport and non-equilibrium current noise in quasi-classical point contacts (PCs) defined in a low-density high-quality two-dimensional electron system in GaAs. At not too high bias voltages $V$ across the PC the noise temperatur
In the ballistic regime, the transport across a normal metal (N)/superconductor (S) point-contact is dominated by a quantum process called Andreev reflection. Andreev reflection causes an enhancement of the conductance below the superconducting energ
The Josephson effect in ballistic point contacts between single-band and multi-band superconductors was investigated. It was found that in the case of Josephson junctions formed by a single-band and an $s_pm$-wave two-band superconductor as well as b
We study a superconducting quantum point contact made of a narrow In$_{0.75}% $Ga$_{0.25}$As channel with Nb proximity electrodes. The narrow channel is formed in a gate-fitted constriction of InGaAs/InAlAs/InP heterostructure hosting a two-dimension